Home > DIY HiFi, POWER > Buffalo II, Musiland 03US Cap Mods Results

Buffalo II, Musiland 03US Cap Mods Results


The normal operation of the Buffalo DAC is to have the DPLL set at “BEST” and with this setting, there are no unlocks whether you are using I2S input or SPDIF input. Even during warm up, with the DPLL set at “BEST”, there are no unlocks.

The DPLL has several settings, and in theory, when set at “LOWEST”, the built-in ASRC rejects the most jitter. It has been widely reported that when the “LOWEST” setting is used with I2S input, the DAC will experience unlocks: a lot during warm-up and then occasionally afterwards. Unlocks will also happen with higher sample rate material if using the lower settings of the DPLL.

The mods I’ve been experimenting with and the resulting measurements have been aimed at understanding and correcting what causes these unlocks. Essentially, the DPLL in the DAC cannot lock into the incoming signal because of jitter. In this post, I report my latest results.


I have added input and output capacitors to the Musiland 03US [link] local regulators and also added output capacitors to the Bufflao II DAC local regulators [link]. These were fairly easy and straightforward mods.


As I said in the previous post, my experience (and my ears) tells me that the current state of the art has long passed my level of audible discernment. All of these devices sound really great with or without the modifications. So I have to use my “poor man’s jitter measurement tool” to see the effects of the mod.

DPLL set at lowest, 44.1KHz material.

This is a remarkable result: never in the past was I able to get unlock-free playing until after the 50 minute mark. In this test, note that there are no more unlocks after the 30 minute mark. Granted this is just a single test,

Second test:

We are back to having unlocks until the 50 minute mark. So the first test was probably an exception. In fact, the behavior is mirrors the behavior of the average of 5 tests performed before the cap mod. Nevertheless, I was never before able to get zero unlocks after 30 minutes.

Now the full 24 hour test (click for larger image):

Zero unlocks at last!

Wow! This result is even more remarkable: FIRST TIME I GET ZERO UNLOCKS IN A 24 HOUR PERIOD. And this when during the afternoon and night hours I was using the computer that was playing music (browsing the web, writing this blog entry, etc) and the family was at home turning lights on/off, using appliances, computers, TV, etc.

Compare with my last long term test where I thought I had reached the best possible results. Those result were quite good but not unlock-free [link],

I think the biggest effect of the cap mods is to add further filtering of the power supply and thus reducing the effect of external disturbances that can cause unlocks after the initial warmup.


I modded the Musiland further by adding a ceramic capacitor to the LC filter of the first regulator. Now both regulators have increased input capacitance and also increased output capacitance in the output LC filter. The capacitance on both LC filters have been increased from 10 uF to 30 uF.

I ran the long term test again:

Again, solid performance after the warm-up. Note the lack of unlocks after the 30 minute mark.


Decided to re-install the capacitors in a different configuration and use larger values. Also while trying to tidy up the ceramic capacitor, the “end cap” detached from the capacitor body. The end cap of these ceramic capacitors seems pretty fragile. I decided to use a horizontal SMT electrolytic capacitor without the plastic encasing while I purchase new capacitors. Ceramic caps have lower ESR.

Here are a 4-hour test starting at around 6:30 PM which seems the electrically noisiest time at home

Again, this is what we would expect, clean (no unlocks) after warm up. I think the Musiland device can provide solid (unlock-free) performance when matched with the Buffalo DAC

Was able to salvage more Kemet Tantalum capacitors. These are 22 uF, 25v and they are not cheap, at about $1 each [Digikey]. According to spec, the ESR is not too bad, 0.8 ohm. Probably not as important here in the LC filter since it is not used as a bypass cap. Besides, it is already an improvement to the existing tantalum capacitor.

Here is the latest iteration of the mod:

After this last mod, I did another long term test for 20.5 hours. This time I got two unlocks (in the same 10 minute interval). I guess there is still room for improvements. For now, I think this is as good as it can get. I think further improvements will come from additional power and EMI isolation.


In summary, the cap mods were easy, economical and resulted in achieving zero unlocks after the warm-up period. It was very satisfying to see this particular mod cap (no pun intended) the long quest for zero-unlocks while having the DPLL set at “LOWEST”.

This is how it was before all the mods. The graph shows the number of unlocks per 10 minute interval just like the current charts, so about 5 hours worth of measurements.

These were the things I tried. I also implemented all of them except where noted:

Mods that definitely worked

  • Cap mods on the local supplies for the Buffalo DAC and Musiland interface
  • Shielding of the Sabre 32 DAC chip
  • Shielding of the DAC board

Mods with potential value (there seem to be some improvements)

  • IL715 Isolator (not used because in theory it adds jitter to the signals)
  • Mechanical damping of the clocks
  • Mechanical isolation of the case, etc
  • Ferrite on the USB cable

Mods that very likely did not improve things

  • Really short I2S wires (like cutting to 3″ from 12″ -after you cut the wires, no use lengthening them again :-))
  • Ferrite bead on the I2S bit clock wire (not used, seemed to be worse)
  • Night time use vs day time use (well, not a mod, but testing noise in the power grid)

In my setup I already had a power filter/conditioner, so it was already used for all the tests.

  1. Coris
    October 7, 2012 at 07:49

    You well confirm my own (old) theory that the (quality/right) decoupling/filtering and high capacity caps have a very high benefit in both analogue and digital stages of a device.
    Now is maybe the right time to try such caps to decoupling the ESS9018 on its analogue output stages (over the original ceramic caps placed around the DAC chip).
    You will be for sure impressed by the result…

  2. qusp
    October 7, 2012 at 08:48

    glt did nothing with the analogue supplies…. aside from the clock anyway. do remember that you were told specifically by TP that adding massive capacitance on the analogue supplies was a BAD IDEA that could brown out the chip and it horrified them!; now you recommend it to someone else? its one thing to put it on the output of an LDO, which could cause resonance, but it wont kill the regulator and may well stabilize it more, but the shunt regs do not like it at all and it makes dynamic performance worse, not better. so he hasnt confirmed your theory there at all

    • Coris
      October 7, 2012 at 10:05

      Is not here about adding large capacities on the shunt regulators output (even though is working…). ESS9018 can have power from something else than (TP) shunt regulators… You (and TP) may misunderstand this idea… It is working very well for me. No any chip is burning…

  3. qusp
    October 7, 2012 at 08:49

    exciting news on the low DPLL mate!

    • qusp
      October 12, 2012 at 07:27

      yeah well given you throw masses of bypass caps at everything that moves and have no way to verify your results I think i’ll leave it.

      • BlogGeanDo
        October 12, 2012 at 15:39

        Well, large input and output capacitors for serial regulators are not exotic at all. Granted I do not have equipment to measure noise, but the unlock count over long periods of time is an indication of improvement. Compare to what I measured before the capacitor mod, there is clear improvement. The best thing of all, is that all mods since I started this project have a cost of a few dollars. Compare to where I started: https://hifiduino.wordpress.com/2012/02/26/poor-mans-jitter-measurement/, one can see HUGE improvements (at least academically, since I can’t hear the difference between DPLL “BEST” and DPLL “LOWEST” :-))

  4. BlogGeanDo
    October 7, 2012 at 21:04

    Hey guys, thanks for your comments. At this point, I do not plan on adding capacitors to the analog section (the shunt regulators) primarily because there is no documentation like what you find for commercial parts where you can find “safe operation region”, noise performance, etc. And also because I have not spent the time understanding how output capacitors interact with shunt regulation.

  5. David Quayle
    October 8, 2012 at 09:13

    Do you hear these unlocks your experiencing, how do they present themselves?

    Or are you just picking them up while testing?

    • BlogGeanDo
      October 8, 2012 at 17:24

      During an unlock, the DAC looses lock with the signal and for a fraction of a second there is no music, so there is no way you can miss them if you are listening to the music. Of course, as you might have noticed, I am sleeping while running the test, so the Arduino detects the unlocks because the DAC has a signal line to indicate lock/unlock

  6. Bunpei
    October 8, 2012 at 09:21

    I think you have obtained a very valuable experimental result! Many ES9018 users including me had assumed that the unlock” events might have reflected insufficient quality (high jitters) of the source side of I2S signals. As Russ once pointed out here, you have revealed the frequency of the events can not be a quantitative measure for “jitter” in source. I think the unlock events after an enough warm-up are caused by accidental external noises mainly in a DAC side.

    I hope you will reexamine Amanero experiments and test the additional effect of Ian’s FIFO.

    • BlogGeanDo
      October 8, 2012 at 17:12

      Hi Bunpei,

      Very true. As the jitter performance of the devices I’ve tested cannot be changed in any significant way, the mods I’ve tried that have reduced/eliminated the unlocks are mainly to reduce the effect of external disturbances. I just repeated a long term test for the Amanero board and unfortunately it is not “zero unlocks”. I’ll have to retest and see if there are no other issues with the test… The FIFO, I’ll have to move to a larger case first since I don’t want to test the device without shielding from a case…But so far, Musiland is showing an edge…

      • BlogGeanDo
        October 12, 2012 at 15:41

        I did another test on the Amanero board and got many unlocks after warm-up. I discovered one of the ad-on caps had a cold solder joint. After fixing it and testing it again, still got many unlocks after warm-up. I think I will try adding output capacitors and do the test again.

  7. David Quayle
    October 8, 2012 at 23:31

    With the very basic setup I have at the moment (BIII) I don’t appear to be suffering any unlocks at any time, well maybe a couple every now & them. If I had been experiencing the number of unlocks you show in your data & they had been audible, I would have thrown the whole lot in the bin long ago.

    Could it be caused by the connection to the Arduino you have implemented? My Arduino isn’t directly connected into the BIII

    • BlogGeanDo
      October 9, 2012 at 02:22

      It only happens with I2S input and DPLL set at lowest. I you set your DPLL set at “BEST”, then there is no unlocks. And if you use spdif input and “Lowest”, then there is also no unlocks. With these settings, unlocks have been reported widely, even with Ian’s FIFO. For me this exercise is kind of academic since I can’t hear differences between “Lowest” and “BEST”. But “Lowest” provides the most jitter reduction.

      Regarding the Arduino, I doubt it is the cause as I can get zero unlocks after warm-up.

  8. David Quayle
    October 9, 2012 at 05:20

    Now I understand, your not crazy 🙂

    • BlogGeanDo
      October 9, 2012 at 16:06

      Yeap, not crazy :-). What is your setup? If you are using I2S, try setting the DPLL to “LOWEST” and see what happens.

  9. David Quayle
    October 10, 2012 at 09:21

    At this stage I’m a Squeezebox man (SPDIF), I have not been able to get more then one source to work on the 4 way input, but that’s ok as I only have one source I use 🙂 The CD player’s sitting in the corner getting ignored. I will get back to that problem when I finish my speakers there taking forever.

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