March 16, 2015 19 comments

(03/24/15) Updated the filter table.

I am consolidating all the user-level information in this post that is spread through several other posts. Where needed, I will clarify and include the latest available information.

ALL POSTS related to dam1021 DAC

  1. Soekris dam 1021 R-2R DAC ILLUSTRATED GUIDE [link]: As the title implies: it is a guide to help you put together the DAC board into a working system.
  2. Soekris dam1021 Build [link]: This post gives details of my own build of the Soekris DAC.
  3. dam1021 R-2R DAC MODs [link]: Here I describe some of the mods I have performed on the DAC.
  4. R-2R DAC For The REST of US [link]: In introductory post describing the innovations and capabilities implemented in this DAC. The information was collected and developed before the DAC was available for sale.
  5. The Soekris R-2R DAC: Technical Details [link]: This post describes some of the technical aspects of the DAC that were not covered in post #4 and collected after it became available for sale. This post together with the one above provides most the technical details of the DAC.


Ref: [1527]



Note: in the diagram above the labels for “RIGHT CH” and “LEFT CH” are swapped. This was noted in the forums [1147] and I also checked it with a R/L test track.

The correct channel assignment (when viewed from the output side) is:

  • Right Channel is on the right hand side
  • Left Channel on the left hand side


NOTE: it could be possible to swap channels in software, but not possible with the current version of the firmware. Channel assignment is required for mono operation.


References: [901], [1108]

The dam 1021 supports the following input connections:

  • Two SPDIF inputs.
  • One Isolated I2S

SPDIF Inputs

You may use one for Toslink and one for transformer isolated Coax as follows [1108]



1.2v and 3.3v power can be taken off the DAC board as indicated in the diagram.

The isolation pulse transformer for the COAX input is a 1:1 type. The Newava Technology Inc S22083 is a favorite [link]. You may find more recommendations in the diyaudio implementation thread [link]


A toslink receiver can be wired as shown in the diagram. The Toshiba TORX147 [link] is a favorite.  Seems Toslink receivers are hard to find in the component stores. eBay seems a good source [link]

A nice Toslink module is the one from Twisted Pear Audio [link]. (It is the one I own). This one has an on-board 3.3V regulator (IC1 in the diagram below) and is to be powered by 5-12V DC. This one has the Toshiba TORX142 module (25Mb) with supports up 192KHz sample rate (data sheet: torx142l), but Toshiba stopped making them. The current one that is on sale at the TwistedPear Audio store is specified to support up to 96KHz and uses the popular and current Toshiba TORX147.



I2S Input (Isolated)

The dam 1021 DAC implements a FIFO reclocker and therefore it does not need master clock input. It works similarly to many modern DACs where an internal PLL or equivalent circuitry locks to the bitclock and generates its own master clock.

The I2S input lines are also noise-isolated with Silicon Labs digital isolators [link]. This means that power needs to be provided to the isolator chips.

Thus the following connections are needed

  • Connect I2S source BCLK to DAC I2S BCLK IN Pin
  • Connect I2S source LRCK to DAC I2S LRCK IN Pin
  • Connect I2S Data to DAC I2S DAT IN Pin
  • Provide source 3.3V to ISO +3.3V Pin
  • AND connect I2S GND to ISO GND


You may also also tap into a 3.3v line in the I2S source if an external supply is not available.

Here is an example using diyinhk USB to I2S adaptor:



The I2S wires (the multicolored ones)


Note: the isolator supply can be 3.3V or 5V. With 5V you can use I2S inputs that are 5V. The isolator is powered on both sides: the clean side (which is the DAC) and the “dirty” side (which is the I2S source). In order to provide complete digital isolation meaning power and ground, the two supplies must be completely separate. More here [link]

Input Selection

The DAC supports automatic or manual input selection as follows:

Input INPSLCT0 Pin (J3)
Auto Selection Open Open DAC will search the 3 inputs for a valid signal and lock when a valid signal is found
I2S GND GND Note that even when not used the USB-I2S interface might output a clock that the dam1021 lock on to….
SPDIF 1 Open GND This input is a sensitive LVDS Receiver -used for Coax [1076]
SPDIF 2 GND Open This input is a standard 3.3V digital level -used for Toslink

I recommend you try Auto Selection first (there is nothing to do). It works very well. Then if you have several sources and more than one active at any time, then implement some circuit (or use an Arduino) to select the desired input.

Signal LOCK indicator

  • Steady on: signal lock
  • Blinking: no signal or no lock



The dam1021 DAC provides the following outputs

  • Stereo single-ended RAW outputs
  • Stereo balanced buffered outputs which can also be used single-ended
  • Both outputs are active and can be used concurrently

RAW outputs

The raw outputs come straight from the resistor ladder passing just through a low pass RC circuit. Raw outputs provide the cleanest, unprocessed output possible most desired by audio purists. It can be connected directly to an amplifier which typically have high input impedance (>10K ohm).


Note: Balanced offset has been measured to be 2V [link] -need to confirm…

Buffered Outputs

The raw output signal is also routed to a buffered single-ended to balanced signal converter as shown in the following diagram:



Buffered Outputs Balanced Connection


Buffered (and RAW) Outputs Single-ended Connection



The buffered outputs are designed to drive high impedance headphones directly. Here is an example connection to headphone outputs:




I am using a Sennheiser HD-580, with a 300 ohm nominal impedance [link]. Sounds fantastic.

CAUTION: direct connection to an amplifier can result in passing the power on/off pops of the DAC potentially causing damage to the speakers. Follow proper power on/off management: turn the DAC on before turning on the amps and turn the DAC off first before turning off the the amps turn the amps off before turning the DAC off. This power sequence will ensure that the pops will not go through the amplifier circuit to the speakers.

If you are using direct connection (of the buffered output) to a headphone, the pops would be annoying but, at least in my case, they would not damage your headphones.


Reference: [link]


The built-in digital volume is enabled with a potentiometer connected as such:


The nominal value for the pot is 10K ohm but any pot would probably work because it is used to set a voltage between 0 V and 3.3V to pin “VOLUME_POT”.

The typical configuration of a potentiometer is the one shown above where the middle pin is the wiper and the end pins are the end connections to the resistance. If you find that your potentiometer does not work as intended you can follow this simple method:

  1. Find the two “end” pins by measuring the resistance as you move the knob. When then resistance does not change when turning the knob, those are the “end” pins that connect to 3.3V and 0V. The third pin goes to the VOLUME_POT pin
  2. If you experience that volume decreases when turning the knob clockwise, reverse the connections

If nothing is connected, the volume level defaults to 0 db.

The advantage of using a potentiometer, as compared to using a rotary encoder (which at the moment is not supported anyway), the DAC always starts with the last volume setting.


The DAC implements several local regulators and therefore it is designed to operate out of a single center-tapped transformer. It can also work with DC input.

The requirements and specifications for the power supply or transformer are as follows [901], [848], [1130]

  • DC: +/- 7.5V DC to +/-15V DC; preferable 9-12V DC
  • AC: dual secondaries 2x 7-8V AC or center-tapped 0-16V AC
  • Power consumption: 2.4V. Thus a 5W transformer is preferred

Transformer Hookup

A favorite transformer is the Hammond 229 series [link] it is a “dual-split bobbin” design with low EMF radiation. It is a step up from the standard low cost transformers.



A 229B16 (rated at 12VA)would be an excellent fit with ample power for DAC. It is available at Digikey for about $16 [link]

Another option is a low voltage toroidal transformer. A good example is the Amveco 70050 rated at 10VA [link]



The basic hookup of a transformer to the DAC is as follows:


WARNING: AC MAINS voltage can cause death. If you don’t know what you are doing, don’t handle mains voltage.

DC Supply Hookup

The basic supply would be a bipolar +/- 12V supply. A low cost 78xx/79xx-based regulators would be good step up from a transformer-only supply

Note: the on-board bridge rectifier is a fast/soft switching bridge and a low cost DC supply comes with standard diodes/bridge – you may be trading off regulation with increased high frequency noise.

You can find plenty of adjustable supplies on eBay for very little money:


Or better yet, get a higher quality one from diyinhk which includes name-brand components:


The basic hookup is as follows. Notice that if you use a regulated supply, you need to increase the voltage of the transformer. A rule of thumb is to use the same AC voltage as the DC voltage.


Users have reported improvements from using a regulated supply over a transformer only supply [link]

…We started with the DAM as it was, with the Salas BiB (low noise regulated supply). We then unplugged the Salas and hooked up the plain transformer.
The change was immediately obvious. The sound thinned, it became more harsh in the high end. It also lost resolution and detail. Going back to the BiB made all the good qualities come back.


Turn the power on and measure the voltages through J2 to ensure proper operation:


The analog power: PWR A- and PWR A+ depends on your input voltage. For a DC value of 12V you will see approximately 11V because of the voltage drop in the bridge rectifier.


Like many modern DACs, the dam1021 has a software interface. You can control the DAC with a micro-controller or a PC, update the firmware and upload custom digital filters.

In most DACs, the communication protocol with the DAC is I2C. In this DAC is serial communication. The dam1021 has two serial interfaces:

  • Noise isolated TTL-level serial (not enabled as of this writing)
  • RS232 serial (enabled with first release)

Communicating with RS232 Interface

Also check dimdim’s blog which has an excellent writeup on the RS232 interface [link]. Here I document my own experience with the interface.

You need:

  • PC serial port
  • Or a USB to RS232 interface cable capable of supporting 115,200 baud
    • Note: The serial port transceiver on the dam1021 R-2R DAC has power savings enabled, to reduce noise. It needs valid RS-232 level on the RXD line to power up. If your USB-Serial dongle also have power saving then you have a problem. [1176]
  • Terminal program

Hardware connection

Connect the RS232 pins to the PC serial port as follows. This is basically a null-modem connection without h/w flow control. You may want to check this informative site on serial communications including RS232 [link]


I made a simple 4-feet cable with 2 twisted pairs of cat-5 wires.


Notice the pins in the board can also be numbered 1-5 counting from the top right in the photo. So pin 2 in the PC serial port goes to pin 3 in the DAC, pin 3 to pin 2 and pin 5 to pin 5.


One can interface with the DAC in two modes:

  • Interactive by invoking the “uManager” and using a terminal application
  • Non-interactive by sending messages to the DAC through the serial port (with or without a terminal application)

Using Terminal Application (Tera Term)

The terminal program must support xmodem file transfer protocol. Putty is a very popular terminal program but does not support xmodem. “ExtraPutty” is an offshoot of Putty and supports xmodem, but it requires .NET but I didn’t want to download .NET. I ended up selecting “Tera Term”. Check the use of ExtraPutty in dimdim’s post [link]

Download Tera Term from [link]

After downloading and extracting all the files, launch the application “ttermpro”


After launching Tera Term, select “Serial” and select the Port you are using to communicate with the DAC.


Configure the serial communication parameters with:

  • Baud rate: 115,200 (This is pretty fast. Use a good, short cable)
  • Data bits: 8
  • Stop bits: 1
  • Parity: none
  • Flow control: none

Click on the “Setup” pull-down menu and select “Serial port”


Invoking “uManager” for Interactive Mode

Type “+++” and wait for the DAC to respond (~1 sec). You must enter “+++”, otherwise there will be no response. If you enter anything else, there will also be no response. “+++” invokes the “uManager” enabling interactive communication with the DAC through a terminal window. The DAC also responds to commands sent through the serial interface (more of that later)

The dam1021 will respond with the following screen. Notice the original firmware is “FPGA Rev 0.8″


Typing “?” returns a list of available commands


Updating the firmware

First download the firmware from [1116] and unzip it (it is a “SKR” file):


Type “download” in the terminal window. The DAC will acknowledge your command and wait for you to start the xmodem transfer.


In the “File” pull down menu select “Transfer” -> “Xmodem” -> “Send” and you will see the XMODEM send dialog box. Select the file you downloaded and click “Open”


The file will start transferring and you can see progress in the progress bar.


After completion, [optional – type “exit” in the terminal window] power cycle the DAC. Type “+++” in the terminal window and wait (~1 sec). You will see the following screen. Notice that the firmware version is now 0.9


Non Interactive Commands

You may send commands to the DAC through the terminal application but without invoking the “uManager”. If you are in uManager, type “exit” to exit uManager. The DAC is then ready to receive messages/commands.



Now that we know how to update the firmware, uploading digital filters uses the same procedure. Lots of filters have been crafted by users in the diyaudio filter brewing thread [link]. Filter files ready to be uploaded are binary files. The filter text files cannot be uploaded. They need to be converted to binary format with the “filter tools” provided by Soren [link]

The procedure for uploading a filter file is hereby summarized:

  • After invoking the uManager, type “download” in the terminal window. The DAC will acknowledge your command and wait for you to start the xmodem transfer
  • In the “File” pull down menu select “Transfer” -> “Xmodem” -> “Send”. You will see the XMODEM send dialog box. Select the filter file you wish to upload and click “Open”
  • After completion, power-cycle the DAC. Note: changing the input or changing a track with a different sample rate also triggers reloading of the filters

An almost complete list of filters from the forums

Filter File Name
1021filt [link] Linear Phase, “Standard” Sharp roll-off Original dam1021 factory filters. Actually it is rather “medium sharp”: around -17dB down at 22kHz, and doesn’t fully attenuate until 24kHz [link]
1021filt_FIR2_MP [link] Same as the original factory filter above but with different FIR2 Original dam1021 factory filters. With FIR2 replaced with minimum phase slow roll-0ff [link]
1021MinPhase-Slowrev1 [link] Minimum Phase, slow roll-off Inspired by Ayre’s “Minimum Phase Listen” filter. No pre-ringing, small post-ringing. Ayre’s white paper here [link]
1021LPSRO441 [link] Linear Phase, slow roll-off Inspired by Ayre’s “Linear Phase Listen” filter. Minimized pre and post ringing
1021SA1 [link] Linear Phase Apodizing (slow roll-off starting at 10KHz, -100db at 21KHz) Inspired by Craven’s Apodizing filter but in linear phase. Minimum pre, post ringing and minimum aliasing, but soft on the top-end because of the much earlier roll-off. Apodizing filters were the rave a few years back
1021SA2F2v1 [link] Linear Phase Apodizing (slow roll-off starting at ~12KHz, -100db at 22.5KHz) Same as above but starting roll-off at a higher frequency but still way before 20KHz. Maybe good for old people :-)
1021filtPOS [link] Minimum Phase, sharp roll-off. No pre-ringing, but lots of post-ringing By POS (creator of rePhase) [link]. “Standard” minimum phase filter.
MB2b [link] Linear Phase, sharp roll-off, using Taylor windowing algorithm, 2x oversampling MB2b is the same as MB2 [link] but with 2x oversampling [link]. It was used in a shootout with other high-end DACs [link] -very interesting read and well written. dam1021 came out second.
DAC 44,1kHz-brickwall [link] Linear Phase, sharp roll-off. Lots and lots of ringing, pre and post. “Standard” filter. By POS. Possibly equal to the original filters. But this is in rePhase format. Use this as a learning tool to create the filter coefficients and then use Soren’s tool to convert to binary formal for download
1021filtNewNOS [link] NOS Latest iteration of a NOS filter. Also includes POS’s improved de-emphasis filter. Lets all the aliased images pass through muddling the sound, but loved by many :-)
1021filt_35HR_LP [link] Linear Phase, sharp roll-off, FIR2 has 3.8 dB attenuation (this is totalcrap v1) Another brick-wall filter with lots of pre and post ringing, with a 3.8 dB attenuation in FIR2 to prevent clipping to benefit those not using digital volume control
totalCRaP_rev2 [link] Same as V1 above, but FIR2 is (linear?) slow roll-off Experimenting with changing FIR2 filters. The TC filters are actually sharper than the original factory filters. More ringing than factory. [link]
CRaPMagic_LP [link] Linear Phase, Slow roll-off (-8dB at 22KHz) Modeled after DacMagic Linear setting. Check user manual for filter behavior: [link]. I think this has similar behavior as Ayre’s Linear Phase “listen” filter. This filter also has a MP slow roll-off FIR2 [link]
1021filt_Mix-Phase1 [link] Mixed phase. Near minimum phase, slow roll-off, minimum ringing Inspired by Ayre’s MP filter
A_CRaP_take on_BH [link] Intermediate Phase, 80 dB Stop Band Attenuation (tradeoff between ringing and aliasing) Inspired by John Swenson/Bottlehead:“The intermediate phase splits the difference and has a small amount of pre ringing and post ringing that is a little bit longer than linear phase but much less than minimum phase. This is also deliberately a short filter”.[link]


Ref: [848]

  • I2S MCLK OUT pin: Master clock output: 45.1584 and 49.152 Mhz (which can also be divided)
  • I2S FSEL IN pin: Input signal at this pin selects between 45.1584 MHz and 49.152 MHz master clock output

Although not advertised as working with the initial firmware, it has been reported to be fully working as indicated above. [link]


March 2, 2015 13 comments

As many know, the BeagleBone Black I2S audio implementation is in a way superior to the I2S audio implementation of the Raspberry Pi primarily because the audio clocks can be derived from the on-board 24.576MHz clock and also through off board oscillators through an I/O pin. It its current implementation, the BBB supports the 48KHz family of sample rates with the on-board oscillator and can support the 44.1KHz family of sample rates with an off-board oscillator.

The current method of generating the clocks for digital audio in the Raspberry Pi are far from perfect. The best clocks are obtained by integer division of the on-board 19.2 MHz clock and works for 48K and 96K sample rates and only if the DAC can accept 40fs or 80fs. For anything else, the clocks are derived from the 500MHz PLL through fractional division as explained above. It has been reported that the 500MHz clock itself is derived from the on-board 19.2MHz clock through a clock multiplier.

Even with a “superior” audio clock implementation, I2S DAC development for the BBB has been painfully lagging that of the Raspberry Pi (so painful that there are no products shipping). The reason is because that there is a lot, lot more community development in the Pi than the Beagle. The RPi has just shipped its 5 millionth device [link] whereas the BBB has only shipped about 220K devices [link].

No longer.


Twistedpair Audio has been busy designing and testing external components to allow the BBB access to lower jitter off-board oscillators and data reclocking for ultimate I2S signal fidelity. These boards are almost ready for general sale [link]

Update 3/26/15: they are available for sale [link], and pretty reasonably priced given the components. (The store says “introductory pricing” though)

The mockup photo below shows (from right to left) BBB, “Hermes”, “Cronus”, and Buffalo III DAC. The board on the top is the Hermes board for the Amanero interface. With Hermes-Cronus, Amanero can use better off-board clocks if so desired.


These links explain the functionality of these boards [link], [link]

  • BBB as the source of I2S/DSD digital audio, it needs external clocks in order to support all sample rates
  • Hermes as the two-way signal isolator (clock signal into BBB, audio data signals out of BBB, and I2C in-out) and I2S/DSD switch. Hermes also has connections for a volume pot, push buttons, etc. that interfaces to I/O pins in the BBB -more details below  (priced at $40 or $16 for the board only)
  • Cronus is the clock board which can accommodate two clocks: one for 44.1KHz sample rate family and one for 48kHz sample rate family. Cronus also provides data realigning of the I2S signals (as opposed to FIFO reclocking) – more details below. (Priced at $50)
  • Clock modules. The clock modules are available separately from the Cronus board with a choice of frequencies and are priced at $35 each. You need two.
  • Total is $160 for Hermes+Cronus+Clocks. You don’t really need the Hermes if all you are interested in are the clocks, so the minimum investment is $120

Here is a photo of the updated Hermes board (the interface/isolator board between BBB and Cronus)


  • Provides isolation for audio signals with 1 -8 channels of PCM – 1 – 4 channels of DSD output
  • Provides I2C isolation
  • SPDIF output is possible.
  • Lots of headers: for Switches/Rotary encoder and drivers for indicator LEDs; USART header, ADC header for analog control; headers for external power/reset switches.
  • Prototyping area (for fun!)
  • Provision for backup battery to protect the BBB on shutdown by providing a soft shutdown(self regulating battery not included in the kit – but very easy/cheap to obtain).

Here is a photo of the updated Cronus


  • Ultra low noise low impedance power supply for clocks (adm7150)
  • A clock selection multiplexer to switch between 44.1 and 48Khz time bases (this means the source must output a clock selection signal). The clocks are isolated from each-other and the rest of the circuit by utilizing L/C filtering
  • A selectable/bypassable ultra low phase noise clock divider to supply 1:2 or 1:4 clocks to a source
  • A synchronous reclocker that re-clocks the audio from the source back to the master clock. This brings all signals back into alignment with the actual master clock regardless of source jitter. Uses Potato Semi flip-flops. To learn more, here is my crude attempt at reclocking [link]
  • SMA and uFL connectors for external clock signals (both in or out), uFL connectors for PCM/DSD output.



IQAudio’s main products to date are audio boards for the Raspberry Pi. As I wrote here [link] their DAC board is one of my favorite for the Raspberry Pi. The DAC boards for the RPi are also very popular, often sold out at the Tindie store [link]

The IQAudio BBB DAC is aimed at a full I2S DAC solution for the Beagle. A photo of a prototype is shown below.As can be seen in the photo, there are no external clocks that can be fed to the BBB. Normally a DAC operates in Slave Mode. The DAC locks to the master clock or bit clock of the source and receives the data from the source device. In the IQAudio solution, the DAC instead is running in Master mode. The DAC generates the appropriate bit-clock frequencies in accordance to the sample rate of the track being played and it “pulls” the data from the BBB. You may follow its development here [link].

According the manufacturer, the board will be available in May at a target price of $45-$60. Please send your queries and comments to IQaudio at

Notice also the I2S headers. Possibly you can use this board and tap the I2S signals and use them for another DAC board.


Comparing with the RPi DAC which is shown below, it seems the BBB DAC uses almost the same components. The innovations are in software: drivers in the BBB side and firmware to setup and control the DAC chip.


There is also an advantage of buying a product from iQAudio (and other similar companies such as HifiBerry) in that they invest in software development (drivers) and provide many ready-to-run software distributions for your embedded computer.


Acko is also planning to release a BBB cape that is derived from their current clock/isolator board which is already a working solution for the BBB. A nice photo from this post [1828]:


The “supercape” adds battery management to the capabilities of the current clock board in an integrated package. It will provide:

  • UPS kicks in when external power is removed. On-board PWR_MON will continue to power the BBB (~1hr) or options to safely shutdown BBB immediately. Same shutdown action if battery level goes below operational level [1088]
  • High Speed Galvanic Isolation with -Synchronous or Asynchronous re-clocking.capability
  • Ultra-low jitter Dual Synchronous Audio Clock (98.304MHz/90.3168MHz or 49.152MHz/45.1584MHz options) – Master Clock
  • All buffered outputs with high drive capability
  • GHz rated switching components

The following diagrams show the work-in-progress for this cape, starting with adding a USP and interface for the BBB and the clock board to the current configuration of a fully integrated cape.

From: [1088]




From [1587]:




The Soekris R2R DAC supports the BBB in synchronous slave mode by providing the required master clock frequency as selected by the BBB. BBB is in master mode, but the DAC provides the clock

  • I2S MCLK OUT pin: Master clock output: 45.1584 and 49.152 Mhz (which can also be divided)
  • I2S FSEL IN pin: Input signal at this pin selects between 45.1584 MHz and 49.152 MHz master clock output

It works in a similar fashion as the TwistedPair and Acko solutions but it has been incorporated into the DAC.

I have yet to experiment with it myself but has been reported to work: [link]

dam1021 R-2R DAC MODs

February 22, 2015 13 comments


The power on/off POP seems benign if listening through headphones. The power-on pop is not loud at all. The power off pop is loud. If connected directly to an amplifier, it can potentially damage the loud speakers.

During Power off, the positive rail drops faster than the negative rail and this creates a voltage imbalance resulting in a huge POP. At some point, the device is practically powered by the negative rail [link]. The effect can also be visually seen:

The left LED is on the positive supply. It goes dim first when cutting the external power.


I attempted to balance the power consumption for the two rails hoping to reduce the turn-off POP.

Adding capacitors to the positive rail

By trial and error, incrementally adding capacitors up to 13,000 uF I was able to balance the power decay between the positive rail and the negative rail by visually matching the turn-off rate of the two LEDs in the supply. The POP was somewhat reduced (using headphones) but not eliminated.

Adding resistors to the negative rail

I then tried to match the current consumption of the negative rail with the positive rail. The power consumption of the DAC is: [1130]

  • Positive Rail: .18A, 10V
  • Negative Rail: 0.06A, 10V

I added enough resistors to increase current consumption by 120 mA. I used 10 1 Kohm resistors on the -12V leg of the supply. Each would dissipate 12 mA of current and .144 W of power -they are rated at .25 W, so we are safe.

The result was better than adding capacitors to the positive rail, the POP at power off was further reduced but still not eliminated. I liked this mod better than adding capacitor, so I made it permanent in the supply.


Note: only tried with headphones. And yes it is a waste of energy, but it is only 1.4W :-)


An apology to my readers for putting up wrong information.

I took a closer look at the J2 connections on the backside and the board and  the +/- analog power connections are connected to the power lines after the RC filter. If you power through J2, there will be a 12 ohm resistor to the filter/smoothing caps. This would not destroy the board, but it is not the right design either. Thus there is no good reason to power through J2.




While examining the back of the board and realizing that J2 cannot be used as input power, I figure it is the perfect place to add capacitors to the power lines. Decided to add 330 uF Oscons to the digital 1.2V and 3.3V and Panasonic FMs to the +/- analog lines. This mod is completely reversible. Just cut the leads. I first soldered a row of pins and the capacitors are soldered to the pins.

Adding capacitors to the analog lines further improves the filtering because it is an RC filter.

There is still the +/- 5V lines but there is no more space. I chose not to add capacitors these lines because the 5V regulators already have large output capacitors, and because I thought they would benefit the least: if you examine the backside of the board, you’ll notice that the connectors at J2 trace from different places in the board. The longest traces are from the +/- 5V regulators.


These power mods are “approved”: [link]

If you insist to improve the on-board power supply, try replacing the 6 electrolytic capacitors with aluminum polymer types, 1000u 16V exist in same 10mm SMD footprint and t.ex. digikey stock them at $2.20 each. Should be easy to replace.

You can also add a small polymer electrolytic on the 3.3V output, but please note that the clock oscillator power already have a filter, so I doubt it will make any difference.

Didn’t want to remove the existing capacitors and risk damaging something. It is too early to do any kind of surgery on the board :-). Plus the existing filter capacitors don’t seem quite easy to remove given that there is very little space between them.


These are the Silicon Labs digital isolators on the board [link]. I believe the original ones in the engineering board were TI isolators [link]. Both isolators use the same capacitive coupling technology. I suspect the Si parts have equivalent performance when it comes to noise isolation.


According to the diagram below, the parts can also be used for logic level translation and thus they can be powered with 5V on the input. This will make the input compatible and tolerant to 5V signals such as those present in a serial interface of a standard Arduino microcontroler.

5V tolerance is also needed if interfacing to the I2S/serial signals of older generation CD players when they used spend good engineering money in making CD-only players. I like older CD-only players as compared to modern multi-format players because they are better made, start up/play much faster and the drawer mechanism is also much faster. You don’t have to wait for the device to check the format, read the contents, etc before it starts playing. If you click “eject”, it immediately ejects; no need to wait for the device to do who knows what before it ejects the disc.


To reduce overall system power consumption, many of today’s high-speed logic devices (e.g. FPGAs) operate from supplies of 3V or less. Lower bias voltages (and consequently lower logic thresholds) complicate interface with 5 V devices, creating a need for a fast and robust logic level shifter… the Si86xx isolator (can be) used as a logic threshold level shifter where each side of the isolator is biased to match the local logic rails. Note the common ground on both sides of the isolator since all
logic supplies are assumed to be connected to a common ground.

However, I don’t have to assume that the logic supplies are connected to a common ground and instead I am going to isolate the two grounds as much as possible by powering the input side with a completely separate supply, including using a separate AC transformer.

I salvaged another transformer (this one gives 9V DC unloaded) and a 7805 series LDO regulator


I had to rearrange the supplies in order to fit them in the chassis. This arrangement is even better as the line voltage components and wires are confined to the left-most area of the case and as far as possible from the low voltage electronics.



To eliminate the ground loop I was experiencing with the external RCA connectors I had to isolate the RCA connectors from the chassis. That did not explain the source of the ground loop though, it merely eliminate the additional path to signal ground. I had no supply ground wires connected to chassis and the only ground connection to chassis was the safety EARTH ground, so where did the ground loop come from?

After some poking with a voltmeter, I figured the source of the ground loop. The mounting holes of the DAC board are encircled with ground pads. These short to the mounting posts and the mounting posts short to the chassis.


If you don’t have a second path (for the signal) to ground, then you don’t have a ground loop. Having signal ground connected to the chassis is probably a safety feature but I have built all my electronics with the signal ground (the supply ground) isolated from the chassis and for safety Iuse a 3-wire power cord with the EARTH ground connected to the chassis. If using the chassis to shield sensitive electronics, then it is a good idea to not share the chassis ground with the electronics ground.

To isolate the mounting posts, I used poly washers for the mounting screws and put them on the top side and bottom side of the board:


These were made from presentation transparencies (remember those?) with a regular 3-hole paper punch and a smaller craft punch. The came out very nice.


Soekris dam1021 Build

February 10, 2015 32 comments


Please also refer to:

  • The Soekris R-2R DAC: Technical Details [link]
  • R-2R DAC For The REST of US [link]

Here is my board (S/N 000003) and even personally signed by Soren :-). I will document my build in this post.



Just finished building a +/- 12V power supply and had it powered-on an entire day in order to ensure that  nothing was wrong with it. Most of the components are from my “pile of electronics”: some now, some recycled.

The transformers were taken from “surplus” unregulated wall supplies and are rated at 15V AC (which are too high of a voltage to use directly on the DAC board).

It is as basic and standard as a linear supply could be.


The AC rectifying part is basically the dam1021 input section

  • Two transformers (AC 15V)
  • Single bridge (2A)
  • Smoothing capacitors. In this case 35V, 2200 uF standard Nichicons, one per rail

The regulators are fixed output voltage LM7812 [link] and LM7912.[link]. Could have used adjusttable, but did not have a negative LM337 at hand.


The film caps are additional bypass close to the regulators.


The “hardest” part of the build was manually placing the components on the board for a good fit. Maybe a CAD layout tool would had been a great help.



Not very pretty, but works fine. The thicker wire in the center is GND.


If building the PS from scratch is too much of a hassle, there are many kits from eBay for very little money. (You still need to source the transformers). The most popular ones are the adjustable ones based on the LM317/LM337. One good example is the following kit [link].


For now, I am not thinking about PS mods, but here is a post with a lot of good information and measurement on the DAC in general and particularly on the power section [link].

After reading the post, these are some of the things that come to mind:

Reducing Power On/Off POP

During Power off, the positive rail drops faster than the negative rail (remember that the positive power consumption is 3X negative power consumption) and this creates a huge POP when the device is practically powered by the negative rail. – Using the additional capacitance of the regulated supply would probably make this problem worse because the capacitors are equal in size between the positive rail and negative rail.

The left LED is on the positive supply. It goes off first when cutting the external power


Possible solutions:

  • Increase the power draw of the negative supply to be equal of the positive supply: you can do this by adding resistors to ground on the output of the supply.
  • Adjust the amount of capacitance between the two rails so that during power off, the voltages on the two rails decay in approximately equal rate. This may or may not work, but it sounds that it could.
  • Separate the analog supply (opamp and voltage reference) from the digital supply which only uses the positive rail. This requires major surgery of the board.

Snubbers on the transformer

The shouty sound can be somewhat tamed by filtering the power line and using optimal snubbers for the power transformer. (Check the Quasimodo/Cheapomodo threads for an excellent snubber measurement jig by Mark Johnson.)

Bypass bridge rectifier (this also “skips” the smoothing capacitors)

Update: I took a closer look at the J2 connections on the backside and the board and  the +/- analog power connections are connected to the power lines after the RC filter. If you power through J2, there will be a 12 ohm resistor to the smoothing caps. This would not destroy the board, but not the right design. (It is actually safe [link]). This is probably only useful if you have a well filtered and regulated DC supply and you are operating near the headroom required by the 5V regulator which is around 7V. In any case, it is better to power through J1.

If using a regulated supply for input power, it is possible bypass the built-in bridge rectifier which is used for AC input. For DC input it is basically serves no function except it adds extra protection in case you inadvertently apply the wrong polarity.

I measured the PWR A+ and PWR A- connections in J2 against the + and – poles of the input filter caps and I measure continuity. 

It would be better to use the GND connections of the power input (the ones in J1)) since they provide a solid and hefty connection to the GND plane. The ground connections on J2 are through thin traces.


But I need to respect the manufacturer’s warning, so here it goes [link]:

I Repeat:

I can only recommend to supply any power on J1, the diode bridge used on the input is a low noise schottky type.

J2 is NOT for supplying power, it’s for testing or for sourcing small amount of power for external input circuits. Applying power will probably blow the board.

But on the other hand, just go ahead, I’ll be happy to sell you a couple of new boards :-)

Connecting the input power this way, bypasses the bridge rectifier (and skips the smoothing capacitors. I say “skip” because it does not bypass them since they are still connected through a 220 ohm resistor).

Replacing and adding on-board PS capacitor

This one is endorsed by Soren [link]

If you insist to improve the on-board power supply, try replacing the 6 electrolytic capacitors with aluminum polymer types, 1000u 16V exist in same 10mm SMD footprint and t.ex. digikey stock them at $2.20 each. Should be easy to replace.

You can also add a small polymer electrolytic on the 3.3V output, but please note that the clock oscillator power already have a filter, so I doubt it will make any difference.

Here is the 3.3V regulator. You may add a capacitor between Vout and GND (pins 1 adn 2)



At this time I would be doing a standard installation before thinking of any other mod.


Old electronics are excellent for these projects. Not only they are free, but at the minimum you get athe power cord/socket installed and some even come with power filters.


This one has a power socket for a detachable power cord and ground safety (the green wire)


Lots of useless buttons, but not bad looking at all :-)


Reusing the RCA connectors: one set for single-ended raw output and one set of single-ended buffered output


Perfect fit.


I like to use the analog-audio cable assemblies found inside (older) PCs. They have three leads (for left, right and ground) and are shielded.



Volume Potentiometer

It is recommended to use a 10K pot. (although a different value one might work as I beleive it is measuring voltage)

I am using one from a gutted Sony analog surround processor (when Japan used to make stuff :-)) which happens to be 10K potentiometer.


Toslink Module

I will be using what I think is the best Toslink Module: the original one from TwistedPear Audio. This one has the Toshiba TORX142 module (25Mb) with supports up 192KHz sample rate (data sheet: torx142l), but Toshiba stopped making them. I purchased this several years back with the OPUS DAC [link] (which got me started in this audio DIY thing). The current one that is on sale at the TwistedPear Audio store is specified to support up to 96KHz [link].

The module has an integrated 3.3V regulator [link] and thus it is compatible with the 3.3V input limit of the R-2R DAC. In addition, the regulator is specified to accept 5-12V DC (with a spec max of 18V). It can therefore be powered directly by the 12V supply. No need to pull the power from the DAC.


The case even has a cut-out for the Toslink module…


USB to I2S Module

I am going to use the original DIYINHK XMOS-based module [link]. This one is USB powered.




Wanted to first check out the DAC with a basic and default configuration: Toslink Input, volume control, and SE buffered output to headphones.

Power connections, volume control connections and SPDIF connection.



Single-ended buffered output to a front-panel headphone jack.



The output opamp, the LME49724 [link] can drive a high impedance headphone directly. It is specified to drive a 600 ohm load meeting full specification.


Since the Senn HD-580 I use has an impedance of 300 ohm, I expect only a slight deviation from the specification, if any.

Front panel: power LED (in the power button), toggle power switch, headphone jack and volume control


I also installed an RCA jack for coax SDPIF. The Toslink module is powered by the +12V supply. The USB-I2S is powered by USB.


Back panel: SPDIF Coax, SE Raw output, SPDIF Toslink and USB-I2S




Just powered it up, original filters. Denon Multiformat player, Toslink output. Senn HD-580 (300 ohm) and Fidelio X1 (30 ohm).


No sound

First there was no sound either from the raw outputs or the SE buffered outputs.

  • The signal lock LED was steady. In auto-input mode, the signal locks quite fast, as it should
  • The voltages on J2 were all correct
  • Removed the volume potentiometer connections, leaving just the SPDIF input
  • Double checked all the output connections

It turned out that I had soldered the wrong connectors on the RCA jacks and the Headphone jacks!

Signal lock LED

  • Steady on: signal lock
  • Blinking: no signal or no lock



Then there was a hum coming from the raw output connected to the RCA jacks (RCA-Head Amp-Headphones). I figure there got to be a ground loop. I measured continuity between the chassis and the RCA GND.

Had to remove the metal plate that was grounding the outer sleeve of the RCA jacks to the chassis (the little metal tabs on each RCA jack).


Volume control rustling/crackling noise

I hear a faint static-like click when adjusting the volume. It is like the old analog amps when the pot was dirty or worn out. But this is digital. I shall investigate this further…

I added a 0.1 uF capacitor between 3.3V and Gnd and between the wiper and Gnd. No improvement. I think the problem could be in software (the FPGA volume software)



Using Toslink source from Denon multiformat player, single-ended buffered output to a Senn HD-580 headphone. Compared with the analog output of the same player through a Fiio top of the line headphone amp.

The immediate most noticeable thing in an A/B comparison with the Denon player is the larger soundstage of the R-2R DAC. Further listening indeed shows a more expansive soundstage, like each instrument and voice fills more of the space around it.

The bass is also more “full bodied” and more impactful. Beautiful bass. I am using the original filter and do not detect any “harshness” as others have.

Perhaps comparing with the Denon is not such a good comparison, but it was easy and shows the that DAC performs very well.

I shall try other filters. Perhaps then I would feel the original filter results in some harshness…

Also, with direct output, I prefer the HD-580 to the Fidelio X1.



Finally connected the DIYINHK XMOS I2S module (this is the original model, different from what Soren is using -I believe the current isolated one).

Listening with iTunes and having iTunes upsample everything to 176.4KHz. Sounds good…


The DAC automatically selects the active input right away. On the XMOS device, once you apply power, there is bitclock and the DAC locks to it.

I am still using original firmware, so the slight clicks when changing sample rate are there. The rustling/crackling sound of adjusting the volume is also still there. I am sure these will be fixed, it the meantime, they don’t bother the listening experience.



In order to power the input side of the isolator, I had to build a small supply with a 5V regulator and a 3.3V regulator (didn’t have anything else suitable). The 3.3V regulator is a surface mount device so I had to solder legs and small heatsink tab. Just a crude but effective job :-)


How does it sound?

Whereas in the previous comparison, the DAC showed a more expansive soundstage, and the bass was more “full bodied”, more impactful, using I2S input (Windows 7 laptop, iTunes 12 with upsampling to 176.4KHz 192KHz [Check my post on adjusting the iTunes playback sample rate [link] and diyinhk XMOS interface) results in another step forward towards better sound and a enjoyable experience. This time the improvement is presented as music with more clarity or “crispiness”  (more details?) as though the instruments give out a more “defined” sound. I think this reviewer gives a pretty good description of what I want to say: [link].

Raspberry Pi 2

February 4, 2015 6 comments

Just a few month after introducing the Raspberry Pi B+, there is a new Raspberry Pi 2. It was reported that the Raspberry Pi 2 would be introduced in 2017 [link]. Maybe someone funded the entire upgrade (Microsoft?)

Same price, much more power and memory (actually those are the only updates: a new SoC chip and more memory)

The 2:


The B+


The SoC has been upgraded from the BCM2835 to the BCM2836. I will have to wait until someone posts the datasheet to compare the internal clock and audio capabilities of the two chips.

However, the hardware clock remains the same. Thus, same problems as before supporting audio sample rate frequencies [link]


The most interesting part perhaps is free Windows 10 for the on the Pi: [link].

Everyone and their grandmother are discussing the new RPI: I found these sites better than the rest…

Technical discussions on the RP1 2:

Audio related discussion on the RPi 2:

The Soekris R-2R DAC: Technical Details

January 30, 2015 53 comments




The Soekris R2R DAC is finally out, officially named

The Soekris dam1021 Sign Magnitude R-2R DAC

I will be collecting useful information here and in other posts because as the thread at diyaudio gets longer, it would be difficult to find things…



The initial release (“v1) of the firmware together enables the following features:

  1. I2S input up to 384KHz sample rate (tested to 192KHz)
  2. SPDIF input up to 192KHz (tested to 96KHz)
  3. Automatic De-emphasis for 44.1KHz material
  4. Built-in set of simple FIR filters for all sample rates
  5. Digital volume control through simple potentiometer
  6. Automatic input selection
  7. Data reclocking: s/w PLL with 0.02 Hz low pass filter
  8. S/W interface (serial interface) allows:
    1. Volume control (e.g. with Arduino and RS232 interface)
    2. Input selection (e.g. with Arduino and RS232 interface)
    3. Loadable FIR filters including bypass filter for NOS support (s/w utility included)
    4. Firmware update/upgrade

Upcoming features (through user-performed firmware upgrade)

Ref: [link], [link]

  1. DSD support
  2. Filter cascading for digital crossover
  3. Filter cascading for balanced use
  4. Master clock output
  5. 4 FIR1 filters for each sample rate selectable through the serial port with a default selection (#2)
    • Linear Phase
    • Medium, optimized mix between Linear Phase and Minimum Phase
    • Soft, mostly Minimum Phase but not that good alias rejection
    • No filter, also called non oversampling, no alias rejection
  6. Improved response for FIR2 filter which will be modified to be pretty soft….
  7. Enabled TTL-level serial port on the isolated side (3.3v)

Rather than incremental updates, Soren is planning a big update [link]



Ref: [link], [link]

The dam1021 DAC “raw” audio output is DC-coupled. The signal out of the resistor ladder passes through a low pass RC filter consisting of a 1200 pf ceramic NP0 type (“audio” grade), and the -3db point is at ~250 Khz (different values have been reported but at this cutoff, it doesn’t really matter to the audio frequencies).

The specs of the raw output are:

  • 0V offset (no need for DC blocking capacitor)
  • Output level: 1.4V RMS
  • Output impedance: 625 ohms, purely resistive.


The raw output is available for single-ended connection. It is also routed to a single-ended to balanced output buffer according to the following schematic:


The buffered output can be used single-ended or balanced. It can drive high impedance headphones directly.

The specifications for the buffered output are:

  • Output level: 2V RMS SE, 4V RMS BAL
  • Output Impedance: 10 ohm SE, 20 ohm BAL


Reference: [link], [link], [link]

Main Power Section


  • Designed to be powered by a single dual 7-8V AC, 5W transformer (since it has has a bridge rectifier installed)
  • Can also take an external +/- 7-15V DC supply. (See section above on power supply requirements for further details)
  • Actual power consumption has been measured to be 2.4W.
  • Filter capacitors are Nichicon 820uF 16V CL series [link]
  • Negative voltage is required for the output opamps and other parts of the circuit [link]
  • A DC-DC converter (switch mode) provides the 1.2V for the FPGA core. Every other supply is low noise linear [link]
  • “The LME output buffers are powered via an additional large RC filter after the main capacitors, no active regulators. With a typical PSRR of 125 db I didn’t worry much about 100/120 hz ripple, only worried about higher frequency noise on the power rails….”

Input Voltage [901]

  • DC: +/- 7 to +/-15V DC; preferable 9-12V DC
  • AC: 2x 7-8V AC
  • Power goes though a diode bridge so polarity doesn’t matter. Connector is MTA156 type.

Maximum and Minimum Input Voltage [848]

  • Upper limit of 16.5V, based on capacitor voltage and also to limit loss in linear regulators.
  • Lower limit of 7.5V, based on loss though diode bridge and 5V linear regulators.
  • Taking into account line voltage tolerance and transformer no/low load voltage, this results in the  7-8V AC requirement for transformers.

Power Consumption [1130]

  • Positive Rail: .18A, 10V
  • Negative Rail: 0.06A, 10V
  • Total: 2.4W
  • The positive supply draw about 3 times as much current as the negative; the current is almost independent of input voltage.

1.2V Supply

The DC-DC regulators is the TI TPS562209 [link]

Here is the reference circuit taken from the datasheet:


3.3V Supply

A 3.3V LDO Powers the Clock [link]



It is a pretty hefty regulator. And it seems the only 3.3v regulator on the board. It must also supply 3.3V to:

  • 3.3V need of the FPGA
  • Clean side of signal isolators
  • SPDIF LVDS receivers
  • Microprocessor
  • Flash memory
  • Other components (like the shift registers?)

Good thing it is implemented next to the clock of all places.

Reference Voltage Supply

The most critical supply is the +/- 4V reference for the resistor ladder.  This is generated by a “two step, first to +- 5V (by linear regulators), then to +-4V by precision low noise medium current opamps”; “-4V reference is sent though an inverter with 0.01% resistors generating the +4 reference”. The references are further  “filtered and buffered for each rail and channel”.

Linear Regulator for +/- 5V

The 8L05A and 9L05A are +5 and -5 Linear regulators [link]. Input to these regulators are the +/- rails (which could be 7 to 15V regulated or unregulated) . The outputs are filterd by 100uF capacitors.



Power Rails Connector/Header [1144]

J2 is a connector to all the power rails, for testing or for supplying (limited) power to other things. The 1.2V  can be used to bias the LVDS for Coax SPDIF input (see users guide)



Original (current) digital filters:

  • FIR1, upsampling from incoming sample rate to 352/384 KHz in one step, with different filter length based on incoming sample rate. All FIR1 filters are basic Parks-McClellan “brick-wall” types, designed with, but still shorter than your regular DAC.
  • FIR1 is automatically bypassed if feeding 352/384 KHz data.
  • IIR, bank of 15 bi-quads operating at 352/384 KHz, with one used for the CD de-emphasis filter, none otherwise used for the basic DAC.
  • FIR2, upsampling from 352/384 KHzto 2.8/3.1 MHz, reasonable short and soft but still using same design as FIR1.
  • All filters are using 32 bit coefficients, with up to 67 bit MAC accumulator.

I’m not a believer in no filters (non oversampling), but also don’t like the sharp “brick-wall” filter types with the pre-ringing. The goal is to work towards filter types that remove just enough to not cause problems with aliasing. It’s pretty easy with higher sampling rates, but is long and hard work and listening tests with 44.1 KHz, which still are the sample rate mostly used….

Further details on the filters [link]


FIR1 is operating at 352.8K/384K (output frequency of the filter and this is set in hardware [link]) and each filter can have up to:

  • 1016 tabs at 44.1K/48K input sample rate
  • 508 tabs at 88.2K/96K input sample rate
  • 252 tabs at 176.4K/192K input sample rate
  • 124 tabs at 352.8K/384K input sample rate, but normally bypassed

This also means that:

  • 44.1K/48K input sample rate, the oversampling filter must be 8X
  • 88.2K/96K input sample rate, the oversampling filter must be 4X
  • 176.4K/192K input sample rate, the oversampling filter must be 2X
  • 352.8K/384K input sample rate, , the oversampling filter must be 1X, but normally bypassed

All upsampling is done by zero insertion, therefore gain needs to be set to match oversampling rate.

  • For 44.1KHz/48KHz sample rate the upsampling is 8X, thus the gain should be 8
  • For 88.2KHz/96KHz sample rate the upsampling is 4X, thus the gain should be 4
  • For 176.4KHz/192KHz sample rate the upsampling is 2X, thus the gain should be 2
  • For 352.8KHz/384KHz sample rate the upsampling is 1X, thus the gain should be 1 (But this filter is normally bypassed

Headroom for clipping prevention due to oversampling and the required applied gain [link]

The dam1021 have 2-4 bit of headroom though the digital filters, all the way until the volume control. So any clipping would be because of incorrect filters.

Why not one step oversampling to 2.8/3.1 MHz? [1557]

Not that practical, would require > 3000 taps. In addition, the intermediate frequency is good to have for the CD de-emphasis and crossover filters.

352K/384K is as a good compromise for the intermediate rate, so there is space for enough IIR filters for crossover use and room correction. If you go up you get less IIR filters. # filters = 45M/49M divided with intermediate rate divided with 8 = 16.


FIR2 is operating at 2.822M/3.072M and can have up to 120 tabs, with input sample rates 352.8K/383K. The FIR2 filter don’t require much, I’m looking into doing a bessel or butterworth type filter there.

dam1021 FPGA fixed point format [link]

The format used in the FPGA of the dam1021 it’s 2.30 fixed point format for the FIR filters and 3.29 fixed point format for IIR filters. (2 bits for the integer part, 30 bit for the fractional part =32 bits). The mkrom utility (part of the filter tools) reads and process the input .txt parameter files as 64 bit floats, including the multiplier, then convert to the 2.30/3.29 fixed formats in the final step, which are pretty good. (The SigmaDSP chips use fixed 4.24 format for coefficients….)

The filter file 1021filt.txt []

There can be multiple of each filters in the 1021filt.txt filter file (part of the filter tools), but at least one (filter) needs to be there for each input sample rate. Currently just the first one for a given sample rate is used, in later firmware releases you will be able to choose between different filters

Filter tools

Filter tools and documentation will be shortly available for users to upload custom filters to the FPGA.  The tools are already available here: [link]


The clock in the dam1021 DAC is the Si514. This the lower grade of programmable clocks from Silicon Labs (.8 psec RMS jitter) [link], and according to Soren, it is well matched to the system as a whole.  It is also used instead of the Si570 because of lower power consumption.


Master Clock Output Pin [848]

  • I2S MCLK OUT pin: Master clock output: 45.1584 and 49.152 Mhz (which can also be divided)
  • I2S FSEL IN pin: Selects between 45.1584 MHz and 49.152 MHz

Same master clock output is also used when connecting multiple DAC’s, for example for digital crossover applications.


Here is a comparison jitter measurement between the Soekris DAC and other DACs [link], [link], [link]


Jitter reduction is accomplished with signal reclocking through a short FIFO. The data is received into a configurable FIFO and then it is reclocked with a lower jitter clock, eliminating most of the incoming jitter.

Further details [link]

The details of my clocking/FIFO:

Ian’s FIFO use a fixed clock, and therefore use a large buffer to take up the difference between incoming and outgoing clock. That add a large delay, which doesn’t matter for simple audio applications but are undesirable in a number of applications, like home theater or live music.

I use a much shorter FIFO, selectable down to 1 mS, and instead adjust the outgoing clock to match the incoming clock frequency as needed, being I2S or SPDIF. The Si514 oscillator used is very low jitter and digitally programmable with a resolution of 0.026 ppb (parts per billion, not million…). It also have the feature that reprogramming inside +-1000 ppm is glitchless, ie the clock adjust very nicely to small changes.


The DAC has two serial interface:

  • Standard RS232 serial interface
  • TTL level Isolated Serial interface (requires firmware > 0.9)

The RS232 interface is provided by the Intersil 3221ECVZ chip [link]

The Intersil ICL3221E devices are 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications. Additionally, they provide ±15kV ESD protection on transmitter outputs and receiver inputs (RS-232 pins).

Valid RS232 levels are >+2.7V and <-2.7V according to the datasheet. Strictly speaking is > +2.4V and < -2.4V but under +/- 2.7 V it may trigger the auto power-down.

Notice that pins 9 and 11 are the TTL level serial lines to/from the FPGA. The chip convert those signals to RS232 compatible levels and provide the robustness of the RS232 standard.




Automatic power down

The chip has  an automatic power-down function for noise reduction. When no valid RS-232 voltages are sensed on the receiver input for 30µs, the charge pump and transmitters power-down, thereby reducing supply current to 1µA.

The ICL32xxE powers back up whenever it detects a valid RS-232 voltage level on the receiver input. This automatic power-down feature provides additional system power savings without changes to the existing operating system.

The chip is a drop in Replacements for MAX3221E, MAX3222E, MAX3223E, MAX3232E, MAX3241E, MAX3243E, SP3243E, meaning it should be fully compatible with USB interfaces implemented with those chips.


  • R-2R DAC For The REST of US [link]
  • USERS GUIDE: [link]


January 6, 2015 11 comments


Picked up a huge Marantz receiver (SR8200) at the local donation center for not very much money.


Even though the donation center has a 7-day return policy for non-working electronics, the receiver was worth more than I paid (to me) in parts alone. I quickly discovered that the volume knob was “stuck”. It is a rotary encoder type (not a potentiometer type). The volume setting would barely move when turning the knob,

Thanks to my familiarity with rotary encoders, I quickly recognized this problem as “noisy transitions” within the rotary encoder. In other words, it needed (more) debouncing. What I did was to install some capacitors to the signal pins and viola! it works almost as new. There is still a bit of debouncing problem but does not affect the responsiveness of the rotary encoder. If I experiment with different value capacitors, I would likely solve the problem, but for now this is good enough.


Other than this, the unit seems to be working properly. The only disadvantage is that now I cannot justify gutting it for parts :-)


From the golden era of Made in Japan audio electronics. Things are put together with more screws than seemingly necessary. Plus, this is the first device where I find the use of copper (or some copper allow) screws. The chassis is made of traditional stamped steel.


Nice brushed aluminum front panel (but the knobs are “metal looking” plastic)


The most ELNA capacitors in one place!


One of the last through-hole, hand-crafted audio components…



This receiver, old enough to be powered by a liner supply, is rated at 6x130W (780W for the amplifier section).

It uses a large EI transformer with a copper flux band. These bands are used In order to reduce the radiated flux from the transformer core,  acting as a shorted turn to the leakage flux (only), greatly reducing magnetic interference to adjacent equipment.


There are two 27,000 uF “Marantz” filter capacitors. Incredibly good looking! I believe they are made by ELNA (as every other capacitor is also ELNA). The heatsink behind the capactors is for the bridge rectifier. .

(Update: a reader alerted me that the caps are made by Nippon Chemicon. The logo is in plain sight)




There is space for two additional capacitors. A nice mod would be to add a couple of Panasonic 4-lead capacitors such as these: Panasonic T-HA 10,000-18,000 uF, 63V [link][link] (with care not to blow the fuse due to in-rush current during power-up)


The SR9200 uses 4 capacitors with higher voltage rating but lower capacity as shown in the photo below  [link]



The volume control is provided by two 6-channel Toshiba TC9482N volume control [link]



These devices control up to 8 analog channels (7.1 multichannel) that area available as pre-out but only 6 of them connect to power amplifiers

The input and outputs are buffered by NJM 2068DD opamps [link]. The “DD” grade devices exhibit lower noise specification. Where have we heard about these NJM2068?… From the development of the famous O2 headphone amp [link]

BOTTOM LINE: For those wanting to skip the Tech Section, the conclusions can be summed up as follows:

At gains less than 4X nothing overall could beat the $0.39 NJM2068 in the O2’s gain stage. This is especially true if you’re concerned about power consumption for battery operation.


Current prices of the 2068DD are $0.60 in quantity 1 orders [link]


Stereo D/A board uses CS4396 D/A (3 of them).



A 6-channel module with forced cooling.




Local power supply bypass capacitors. Notice the space for larger size capacitors (the higher model SR9200 uses larger capacitors). Replacing these capacitors with larger ones (a 1000 uF nichicon KW [link] for example -maximum diameter is 16mm) would be an easy mod.


Local PS bypass capacitors in the SR9200


Output transistors: SANKEN A1492 (PNP) and C3856 (NPN)



There is an 8-channel analog input option (7.1 input) that bypasses all the digital processing. They are controlled by the analog volume chips and the output is available through the 8-channel pre-out. Six of those 8 channels are connected to the  6-channel power amplification module. This receiver can be used as a stereo tri-amp setup.



AKM Verita 4490EQ DAC

December 7, 2014 49 comments

(12/22/14- Updated with information from AKM support engineers -see register section)

It has been a long time semiconductor houses invested in a flagship product. Wolfson announced the WM8471 in 2007 and ESS announced the Sabre DAC in 2008. Recent investment has been concentrated in DACs for the broad consumer industry especially for the mobile segment. It is good to see a company still interested in investing resources for the “audiophile” segment.



AMK introduced the AK4490 this year and has recently made it available in production quantities. It differs upon the AK 4399 DAC in the following areas (yes, the spec for Dynamic Range is lower in the new chip):

Parameter AK4490
 THD  -112 dB  -105 dB
 S/N (Mono)  123 dB  126 dB
 Max Sample Rate  768KHz  216 KHz
 Built-in Digital Filters  5  2
 Direct DSD (No conversion to PCM)  Yes  No
 AVDD Max operating voltage  7.2V  5.25V

Here is an overlay of the FTT measurement between the AK4490 and AK4399 (graph slightly shifted to the right to show the comparison) from the  evaluation board data sheets. As seen, the AK4490 has a slight edge over the AK4399:


Increasing S/N by 3 dB

In order to “recover” the lost S/N in the new device as compared with the old device, The AK4490 can be operated with an analog supply of up to 7.2V. At 7V  we gain 3dB S/N resulting in 126 dB for mono operation and therefore meeting the best specification of the old A4399 part.

Even though this is not documented in the current version of the AK4490 data sheet, it is documented in the AK4495 data sheet:


Thus one of the “mods” that can be made in this DAC is to run the DAC at the higher-end of the analog voltage operating spectrum.


Built-in Digital Filters

(images taken from Ayre’s paper [link]):

The built-in digital filters consist of 5 selectable filters. They include all the “popular” filters developed so far by different vendors plus one additional filter with undisclosed response (super slow roll-off). The filters are described as follows:

LPSRLinear phase Sharp Roll-off (AKM notation: “no delay”): this is the “standard” sharp roll-off filter found is all DACs. It is also known as the “brickwall” filter. It is said that pre-ringing sounds unnatural.

LPSlRLinear phase Slow Roll-off (AKM notation: “no delay”): this is also a “standard” filter found in all DACs. As in the linear phase sharp roll-off filter, it also generates pre-ringing, but trading lower amounts of pre-ringing with letting more aliased image through (theoretically increasing harmonic distortion).

MPSRMinimum delay Sharp Roll-off (AKM notation: “short delay”): this is also called the “minimum phase” or “apodizing” filter that was the rage a few years back. Whereas in the past audio engineers have insisted in phase linearity (meaning all frequencies have equal phase or delay), More recent research have shown that a “minimum phase” filter sacrifices some of the phase linearity (adds some phase distortion) for better time response. This filter removes all the “unnatural” pre-ringing but “dumps” all that energy to post-ringing. Implementation of this filter is also found in the Wolfson WM8741/8742 DACs

MPSlRMinimum delay Slow Roll-off (AKM notation: “short delay”): this is a “more modern” type of filter also found in the Wolfson WM8741/8742 DACs. In addition to eliminating pre-ringing, this filter also incorporates slow roll-off and this reduces post ringing as well.

The properties of this filter are similar to the “MP filter” found in Ayres latest CD player.

Super Slow Roll-off: this filter is the differentiating feature (in terms of built-in filters) that this DAC provides. The AKM literature says “super slow roll-off filter with emphasized characteristics” (which really means nothing). There is some information in the marketing page as shown below.

The marketing information says the following [link]


Native DSD Support

Supports 2.8MHz (64fs), 5.6MHz (126fs) and 11.2MHz (256fs) DSD

According to AKM, the volume control module and the delta-sigma modulator can be bypassed for DSD resulting in “direct” DSD rendering. The AK4490 contains an integrated low-pass filter specifically for DSD data. The ultimate specified performance for SACD (as described in the Scarlet Book) can be easily realized with a simple external analog filter.


Notice the bypass path for DSD Data. The DSD data is received by the DSD interface and sent directly to the “SCF” (Switched Capacitor Filter) block. DSD filter can be selected at 50KHz, 100KHz or 150KHz cut-off.

Other Comparative Features

Resolution32 bit32 bit32 bit24 bit24 bit

Parameter AK4490EQ  ES9018 ES9018K2M WM8741 PCM1794
DR (Mono) 123 dB 135 dB 127 dB 128 dB 132 dB
THD -112 dB -120 dB -120 dB -100 dB -108 dB
Max SR 768KHz 384KHz 384KHz 192KHz 192KHz
Output Mode Voltage V or I (best) V or I (best) Voltage Current
Resolution 32 bit 32 bit 32 bit 24 bit 24 bit
DSD Mode DSD Direct and DSD to PCM DSD to PCM DSD to PCM DSD Direct and DSD to PCM

Just like the WM8741, the AK4490 supports “direct DSD” processing bypassing the volume control and delta-sigma modulator. And like the WM8741, there is no automatic switching between PCM and DSD.

I2S and DSD shared lines

In order to facilitate the playing of both PCM and DSD content, it is desirable to have the same lines transmit PCM and DSD data. We find that in the AK4490, the I2S and DSD signals are shared. Here is a post I write earlier concerning shared I2S/DSD signal lines: [link]

The table below shows compatible DACs (DACs that share that use the same lines for DSD and PCM) and interfaces showing how the DSD pins are mapped to the PCM/I2S pins:

I2S Pins
ESS9018 [link]
PCM1795 [link]
AK4399 [link]
Amanero [link]
SDTrans [link]
XMOS Ref [link]
BCLK DSD Clock DSD Clock DSD Clock DSD Clock DSD Clock DSD Clock
DATA DATA Right Data Left Data Left Data Right DATA Right DATA Right

The AK4490 DAC follows the mapping of the AK4399 which switches channels with the “conventional” channel mapping of USB interfaces. Likely it was the USB interface designers that took notice of the ESS9018 DAC and conformed the channel mapping to that chip.

Fortunately, there is channel remapping in at least the Amanero interface and there is channel remapping in the DAC itself as specified in the following table of the data sheet:


MONO=0, SELLR=1 says:

  • Right channel input is mapped to Left channel output
  • Left channel input is mapped to Right channel output


I Just received diyinhk’s implementation of AKM’s new flagship DAC, the AKM AK4490EQ [link]. This is the first available diy board in the market (that I know of):



The Diyinhk implementation follows (mostly) the AKM evaluation board and data sheet [link] but maximizes performance whenever possible (like in the selection of capacitor type and value). The board is powered by: 5V line, 3.3V line and +/- 12V line (for the output opamp).


The general layout of the power traces, decoupling capacitors and ground planes also follows the data sheet:

Grounding and Power Supply Decoupling:

To minimize coupling by digital noise, decoupling capacitors should be connected to AVDD and DVDD respectively. VREFHL/R and VDDL/R are supplied from analog supply in system, and AVDD and DVDD are supplied from digital supply in system. Power lines of VREFHL/R and VDDL/R should be distributed separately from the point with low impedance of regulator etc. AVSS, DVSS, VSSL and VSSR must be connected to the same analog ground plane. Decoupling capacitors for high frequency should be placed as near as possible to the supply pin.

Analog 5V supply lines (can operate up to 7.2V according to spec)

The 5V supply connects to VDD (5V Analog supply input) and Reference Voltage High (VREFH) -as recommended in the data sheet.

The differential voltage between VREFH-L/R and VREFL-L/R sets the analog output range. The VREFH-L/R pin is normally connected to VDD (analog 5V supply), and the VREFL-L/R pin is normally connected to VSS1/2/3 (analog ground). VREFH-L/R and VREFL-L/R should be connected with a 0.1µF ceramic capacitor as near as possible to the pin to eliminate the effects of high frequency noise…All signals, especially clocks, should be kept away from the VREFH-L/R and VREFL-L/R pins in order to avoid unwanted noise coupling into the AK4490.

In addition, according to the eval board manual, a large value capacitor between VREFH-L/R (Analog 5v) and VREFL-L/R (GND) improves the THD performance in accordance to the following graph:



The Diyinhk board is implemented with 2200 uF capacitors, achieving the best THD numbers. (The larger capacitor  holds the reverence voltage stable -perhaps an even larger capacitor would further improve the low frequency THD numbers).

There is an option to use separate supplies for right and left VREF and VDD. This also follows the scheme implemented in the official evaluation board where the left VREF is separately powered from the right VREF.


Further, the AKM literature states:

Special designs techniques for sound quality are applied to each blocks for achieving balanced, smooth and powerful signal flow. In addition to L/R perfectly symmetrical layout, more than 5x trace width is used for signal line compared existing products, supplying rich current to analog signal output blocks. To achieve low impedance, two analog power supply pins and two signal reference pins are assigned for each channel, allowing the system to utilize thick PCB trace pattern giving low impedance sources.

The board takes advantage of this feature to use thicker lines for VREF and VDD

All 0.1 uF decoupling ceramic capacitors are C0G


The official evaluation board has a provision to separate the VREF from the Analog 5V VDD which is not implemented in this board. However, it is easy to mod and use separate supplies for VREF and Analog 5V VDD.

The evaluation board implements VREF with the following circuit:


3.3 V Supply Line (Analog 3.3V and Digital 3.3V)

There is a 3.3V analog supply pin and a 3.3V digital supply pin in the chip. The default implementation of the diyinhk board uses the same supply line but filters them with a ferrite bead. By removing the ferrite bead, the user can use separate supplies for the analog and digital 3.3V.


In the evaluation board, AVDD and DVDD are powered by separate regulators:




The ground planes follows the recommended separation between analog and digital sides (along pins 17-18 and 45-46)





The older device, the AK4399 supported a 3-wire serial interface. This seemed a not too widely supported protocol (it was not SPI and could not find a similar protocol in Arduino libraries , but one could code the protocol “by hand” as it was just a serial protocol -never tried it though)

Fortunately the new DAC supports I2C protocol (and maintains support for the original 3-wire serial interface found in older DACs). This greatly facilitating the interface to a microcontroller such as Arduino because of their built-in support for more standard protocols such as I2C and SPI.

The advantage of using the S/W interface is that it supports features such as volume control and DSD which are not available through the H/W interface.

The following table summarizes these features that are available in H/W interface (parallel interface -by pulling hardware pins up or down) and S/W interface (serial interface -microcontroller control).


Not indicated in the table is the “super slow roll-off” filter which is enabled by a register setting in s/w mode.


(Updated with information from AKM support engineer)

Here I summarize the register settings and the different functions that can be programmed. I also attempt to do some “translating” of AKM’s vocabulary to more “traditional” vocabulary.

I was able to communicate with AKM to clarify the functionality of certain sections.

Register address: 00 (Control 1)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Reset chip without initializing registers
|_|_|_|_|x|x|x|_| Interface mode: 16bit, 24bit, 32bit, I2S, LJ... (1)
|_|_|x|_|_|_|_|_| External digital filter clock: 768KHz/384KHz
|_|x|_|_|_|_|_|_| Enable/disable external digital filter mode 
|x|_|_|_|_|_|_|_| Master Clock frequency Setting: auto/manual (2)(3)

(1)- The only requirement for bitclock is >= 2x bit depth. Bitclock could be
32fs, 48fs or 64fs. Not limited to always be 64fs as in ESS DACs
(2)- Auto: detects master clock frequency and sampling frequency (44.1KHz,
96KHz, ...) automatically; sets oversampling rate (1x, 2x, 4x...) according to
input MCKL (this is kind of obvious).
Note: AKM calls sample rate "sampling speed" and assigns names to typical
sample rates: 44-48KHz="normal", 88-96KHz="double", 175-192KHz="quad"...  
(3)- Manual: manually set the sampling rate (44.1KHz, 96KHz...) Use reg 01 and
reg 05 for sampling rate setting. This means, in its simplest form, manually 
matching the sampling rate to the incoming data sample rate to use the highest
oversampling rate allowed by the system and thus obtain best noise performance.
This feature can also be used to select a different sampling rate (typically a
lower oversampling rate); for example, if selecting "normal" for 44.1KHz allows
8x oversampling (512fs), selecting "double" results in 4x oversampling (256fs).
This allows for experimentation with different oversampling rates and can be
used to tailor the sound for those inclined to lower oversampling or even no
oversampling. The use of lower oversampling results in higher noise for these 
kind of DACs. AKM indicates in the datasheet that using a lower oversampling
rate (512fs to 256fs) results in a decrease of S/N of 3dB.

Register address: 01 (Control 2)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Mute/unmute
|_|_|_|_|_|x|x|_| De-emphasis: Off, 32KHz, 44.1KHz, 48KHz
|_|_|_|x|x|_|_|_| Manual setting of sampling speed: "normal", "double"... (1)
|_|_|x|_|_|_|_|_| Short Delay/Traditional filter (Minimum/Linear phase)
|_|x|_|_|_|_|_|_| Zero data detect mode: Separate channels or ANDed channels
|x|_|_|_|_|_|_|_| Zero data detect ON/OFF

(1)- Manual sampling speed setting uses 3 bits. The third bit is in reg 05. 
See notes on register 00 for additional info on manual settings 

Register address: 02 (Control 3)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Filter cutoff slope: fast/slow
|_|_|_|_|_|_|x|_| MONO mode: left/right
|_|_|_|_|_|x|_|_| Invert output pin level on zero detect
|_|_|_|_|x|_|_|_| MONO/STEREO mode
|_|_|_|x|_|_|_|_| DSD Data on clock falling/rising edge
|_|x|_|_|_|_|_|_| DSD master clock frequency:512KHz/768KHz 
|x|_|_|_|_|_|_|_| PCM/DSD mode

Register address: 03 (Left Channel Attenuation)
 7 6 5 4 3 2 1 0
|x|x|x|x|x|x|x|x| Attenuation (1)
(1)- 256 levels, 0.5 dB each. 00=mute; ff=max volume

Register address: 04 (Right Channel Attenuation)
 7 6 5 4 3 2 1 0
|x|x|x|x|x|x|x|x| Attenuation (1)
(1)- 256 levels, 0.5 dB each. 00= mute; ff= max volume

Register address: 05 (Control 4)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Super Slow filter on/off
|_|_|_|_|_|_|x|_| Bit 3 of the manual sampling speed setting (see reg 01)
|_|x|_|_|_|_|_|_| Left channel phase invert ON/OFF
|x|_|_|_|_|_|_|_| Right channel phase invert ON/OFF

Register address: 06 (control 5)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| DSD bit 0 of sampling speed selection (bit 1 is in reg 9)(1)
|_|_|_|_|_|_|x|_| DSD Mode: Direct/Convert to PCM (2)
|_|_|_|_|x|_|_|_| DSD Automute release when Automute release is in "hold"
|_|_|_|x|_|_|_|_| Automute release: Auto/hold (3)
|_|_|x|_|_|_|_|_| Right Channel DSD flag when detecting full scale signal
|_|x|_|_|_|_|_|_| Left Channel DSD flag when detecting full scale signal
|x|_|_|_|_|_|_|_| DSD AutoMute: ON/OFF (4)

(1)- There is no facility for setting auto sample rate detection for DSD. The
use must detect the incoming DSD sample speed and match the sampling speed. 
Will have to experiment to see what is the effect of sample speed mismatch.
(2)- In DSD direct mode, the volume control and delta-sigma modulator are
bypassed. In PCM mode, it converts to PCM and uses volume control block and 
delta-sigma modulator. DSD direct with a combination of the internal filter
and simple output filter meets the filter specification of the SACD Scarlet
(3)- Automute condition disappears when data becomes under full scale
(4)- Automute condition is when data is full scale

Register address: 07 (Control 6)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Synchronize ON/OFF (1)

(1) Synchronizes multiple DACs when used together in the same system. Read
data sheet for more information.

Register address: 08 (Control 7)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|x|x| Sound Quality Control Setting (1)

(1): Sound Control has 3 settings: "1", "2", "3". The AK4495 data sheet shows
additional settings "4" and "5". These setting refer to the 5 different filters
that are available in the DAC. They serve the same function as the filter 
selection bits specified in the other registers. What is unclear is which
register takes precedence.

Register address: 09 (Control 8)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| DSD bit 1 of sample speed selection (see also reg 5)
|_|_|_|_|_|_|x|_| DSD filter selection when in DSD direct mode

Raspberry Pi B+ Digital Audio

November 13, 2014 5 comments


Although the Raspberry Pi has built-in analog audio output, the interest here is in digital audio output in particular I2S output signals for direct connection to digital to analog converters. I explored a bit the digital audio capabilities of the Raspberry Pi a while ago [link]. Here is an update with more accurate information.

The digital audio capabilities of the Raspberry Pi B+ have not changed from previous versions. The I2S audio is supported by the Broadcom BCM2835 [link]  peripheral SoC chip. The datasheet shows that the PCM audio interface consist of 4 signals, notice that there is no Master Clock signal:

  • PCM_CLK – bit clock.
  • PCM_FS – frame sync signal. Frames can be up to 32 bit wide
  • PCM_DIN  – serial data input.
  • PCM_DOUT – serial data output.

In addition, for more advanced configurations, the device can be configured as master or slave: “the direction of the PCM_CLK and PCM_FS signals can be individually selected, allowing the interface to act as a master or slave device”. In normal operation, it is configured as a master device.


In the Raspberry Pi B+, The I2S output are assigned to the following pins:



The audio frequencies (the PCM _MCLK) are supposedly generated by the use of a discrete 0n-board 19.2 MHz crystal. Unlike the BeagleBone Black, where there are facilities (pins) to feed an external master clock.


The frequency that is generated at any of the I/O pins, say the bit clock, is obtained by dividing the source clock (19.2 MHz oscillator) by configuring a clock division register with an integer part and a fractional part as indicated by the datasheet excerpt shown below:


The Datasheet indicates that the clocks are generated by “noise-shaping MASH dividers” which are fractional dividers. It also says that “The fractional dividers operates by periodically dropping source clock pulses”. I believe this post has an example on how this is actually implemented [link].

The way that a 3.25x clock divider is implemented is by dividing by 3x for some periods and 4x for other periods, with the average being 3.25x. In this case the repeating pattern will be (3, 3, 3, 4). That is shown in the following scope capture. Note that the first three periods are divided by 3 and then the next is divided by 4.
The way this is implemented in the device is to divide by the smaller divider and then extend the high pulse width by one clock cycle periodically.

We can find the integer divider and fractional divider based on MASH 1 (see above) and determine what is the maximum and minimum output frequency:

  • Source clock: 19,200,000 Hz
  • Sample rate: 44,100 Hz; bit clock (64fs)=2,822,400 Hz
  • Actual divisor: 6.8027. Integer part=6
  • Fractional divisor: =0.8027×1024=822 (round off)
  • Maximum frequency: 19,200,000/6=3,200,000 Hz (50 KHz sample rate)
  • Minimum frequency: 19,200,000/7=2,742,857 Hz (42.9 KHz sample rate)
  • Average frequency: 19,200,000/(6+(822/1024))=2,822,394 Hz (44.1 KHz sample rate)

Well, aiming at 44.1KHz sample rate frequency and getting a frequency variation from 42.9 KHz to 50KHz, this can’t really work for digital audio. Clearly there has to be a better way to generate these clock frequencies.


Much of the credit for enabling I2S output in the RPi (and the proper generation of clock frequencies) is due to the discussion in the Raspberry Pi forums [link] and work of Florian Meier in his master thesis “Low-Latency Audio over IP on Embedded Systems” [link] who subsequently developed the basic “ALSA SoC I2S Audio Layer for Broadcom BCM2708 SoC” audio kernel driver [link]

There it is explained that in order to get good clocks, one has to use integer division but with a 19.2 MHz clock, it is impossible to arrive at 32fs or 64fs bitclocks (e.g. 64x48KHz=3.072 MHz). Therefore other internal clocks must be used.

According to this post [link] the clocks sources are:

0     0 Hz     Ground
1     19.2 MHz oscillator
2     0 Hz     testdebug0
3     0 Hz     testdebug1
4     0 Hz     PLLA
5     1000 MHz PLLC (changes with overclock settings)
6     500 MHz  PLLD
7     216 MHz  HDMI auxiliary
8-15  0 Hz     Ground

The logical choices are the external 19.2MHz and the highest stable frequency clock which is the 500 MHz clock (highest frequency generates a more accurate clock after fractional clock division)

The author presents two solutions:

  • Use the 19.2 MHz oscillator with integer division for DACs that do not require a specific ratio of bit clock to frame sync (e.g. 32fs for 16 bit data) as long as there are at most enough bit clock cycles within a frame sync cycle to contain the desired word length
  • Use the 500 MHz internal PLL with fractional division for DACs that do require a specific ratio of bit clock to frame synch (e.g 32fs or 64fs)

The first solution says that it is possible to use, say 40fs, to sent 16 bit samples (16bitx2=32bit per frame) because you can transfer all 32 bits in a 40 bit frame. If you can use 40fs for the bitclock, then 40x48KHz= 1.920 MHz which is 19.2 MHz/10. The following excerpt from the thesis explains these two approaches:


We notice that integer division of the external 19.2 MHz clock only works for 48KHz and 96 KHz and for DACs that can operate at 40fs (80fs if we want to pass 32×2 bits per frame). The current version of the code is using 50fs and 100fs which also works.

For the 44.1KHz sample rate or for bitclock requiring 32fs or 64fs, then the first solution with fractional division is used on the 500 MHz PLLD clock


The fact that no clean clocks can be generated in the digital audio frequency range, tells us that this oscillator was not really meant to be used for digital audio. Now why did the designers of RPi use a 19.2 MHz clock?

I have searched extensively and cannot find a “reason” for the 19.2 MHz frequency. If it were digital audio, a more logical selection would have been 24.576 MHz in order to cleanly support 64fs 48KHz sample rate (like the BeagleBone Black).

A better reason is to use this clock for the on-board PWM audio. One can easily generate a 48KHz carrier frequency (19.2MHz/40) and a resolution of 16 bit would require a frequency of approx 64 KHz (19.2MHz/30). In actually, it has been reported that the resolution is in the neighborhood of 11 bit or 2048 levels which can be obtained by dividing 19.2MHz by a factor of 9375.


A better solution is to configure RPi as a slave device and the DAC as a master device.

The DAC can provides a much more accurate clock to the RPi by feeding the Bitclock. I don’t think is being done by the current crop of DACs (the ones based on the PCM5122)  but the capability is there for both in the RPi (“clock slave mode” and “frame synch slave mode”) and the PCM5122 as shown in the following excerpt from the datasheet:


Here is what is required to set the DAC in Master Mode, say for example the PCM5122.

  1. RPi detects the sample rate of the clicked-to-play track.
  2. RPi has a way to indicate the sample rate (for example using GPIO pins).
  3. Microcontroller reads sample rate.
  4. Microcontroller programs the appropriate frequency by generating an appropriate master frequency from the PLL and setting the appropriate divider to generate the bitclock.

Other considerations:

  • Timing of the different events. For example, wait until the microcontroller programs the DAC to the appropriate clock frequency before staring the data stream (DMA) in the RPi.
  • Selection of external clock. For example use a single frequency clock, say a multiple of 44.1KHz in order to take advantage of integer divider only when dealing with frequencies multiple fo 44.1KHz.


Here is the previous comparison table with some updated observations (italics)

Parameter Rasberry Pi
BeagleBone Black
Native I2S support Yes Yes Both platforms can support I2S output, Custom drivers have been developed by the audio community
I2S Sample Rate limitation Up to 192KHz (because the on-board clock is 19.2MHz) Only 48KHz family (because the on-board clock is 24.576MHz and integer clock dividers) BBB supports 48KHz, 96KHz, 192KHz and 384KHz. RPi supports 44.1KHz, 48KHz, 88.2KHz, 96KHz, 176.4KHz and 192KHz (in theory). RPi uses “fractional clock dividers” to generate the 44.1KHz sample rate family as explained above
Support for USB DAC Yes (LAN9512 chip [link]) Yes (Built-in in the main processor) USB in the RPi goes through a built-in HUB and it is shared with the LAN controller within the USB/LAN chip. USB in the BBB is natively supported by the main processor; LAN has a separate chip
Support for external, low jitter clocks Not possible unless you replace the on board oscillator and modify the driver Yes with custom boards and custom s/w: [link] The master clock in BBB may be provided externally by disabling the on-board audio-freq clock.The Master clock in the RPi seems internally generated and there is no I/O pin to feed an external master clock
Master clock output No Yes (from on-board clock) The Master clock in BBB is provided by the on-board 24.576MHz and fixed at this frequency and can be directly accessed from the outside. The Master clock of RPi seems internally generated but un-accessible from the outside. Without Master Clock, you can only use DACs that can operate asynchronously without a Master Clock input such as the ESS DACs or DACs that can operate with the master clock = bit clock
Built-in rechargeable battery operation No Yes [link]. Maybe Rechargeable Battery operation in BBB would disable the 5V supply to the USB. Thus for USB operation, where the USB adapter takes the power from USB, BBB must be powered with 5V DC
Built-in Storage No.  But the new model has plenty of USB ports for USB memory sticks 2 GB eMMC Flash BBB can boot from the internal storage freeing the SD card for music storage. RPi requires that the OS be stored in the SD card (although it may be possible to also store music in the SD card)
Looks The latest model looks Good Good :-)
Audio H/W and S/W community support Large Small
Price $35 $55

Here is a summary of the phase noise measurements from this post [link]:

I2SPhaseNoise 2


  • The ESS9023 implements a “jitter eliminator” (asynchronous sample rate converter) but cannot eliminate all the jitter
  • The clocks on the embedded boards have a lot of jitter. It also makes sense that the BBB has better measurement than the RPi. In the BBB, the 48KHz sample rate frequency is derived by integer division of the external clock. In the RPi, the 44.1KHz sample rate frequency is derived from the 500MHz clock which is derived from the external clock as explained above
  • The “lowly” CD player is still a pretty good playback device in terms of jitter
  • I would guess (and only a guess since the author does not identify these interfaces) USB-I2S-2 is an XMOS-based device based on how the clocks are generated and that USB-I2S-1 is a device based on an FPGA or CPLD using two external audio frequency clocks (where straight integer division is used)


The current method of generating the clocks for digital audio in the RPi are far from perfect. The best clocks are obtained by integer division of the external clock and works for 48K and 96K sample rates and only if the DAC can accept 40fs or 80fs. For anything else, the clocks are derived from the 500MHz PLL through fractional division as explained above. It has been reported that the 500MHz clock itself is derived from the 19.2MHz external clock through a clock multiplier.

However imperfect as these clocks might be, there are a good number of DAC boards that have been developed and reported to work well with the RP1. As these products are being developed by audio fanatics, we can expect continuous improvements and enhanced approaches to better clock generation such as external reclocking and slave configurations.

For additional info, you can check the Raspberry Pi I2S discussion thread here: [link]

Raspberry Pi version B+

November 12, 2014 11 comments

Previously I wrote:

I had ordered a BBB for no other reason that it’s better looking than the Rpi :-)

Well, no longer. I ordered the new version B+ because it is as good looking as the BeagleBone Black :-)



Not really. The reason is because that there is a lot, lot more community development in the Pi than the Beagle. In fact if we just look at shipments, the Raspberry Pi sells almost 20 times the amount of BeableBone Black (over 3.8 million [link] vs 200,000 devices [link]). This is a huge advantage in the popularity front.

I had been a fan of the BeagleBone board [link] mainly because it is a higher performance board and had local storage. In addition (by design or by accident) the audio master clock uses an on-board 24.576 MHz clock from which it derives the frequencies for 48KHz sample rate material with integer division. There is also the capability of receiving the master clock from external sources and thus it is possible to feed it a higher quality 24.576 MHz and 22.5792 MHz clocks. There has been a clock board (and corresponding drivers) in the works since early this year, but nothing available yet as of this writing [link]

In contrast, there has been a much larger development effort in the RPi front as testified by the numerous I2S DAC boards that have become commercially available. Many of these companies are dedicated to building audio solutions first for the Raspberry Pi and then possible for other embedded platforms.

Here is a list of DAC boards available for the Raspberry Pi (versus none for the BeagleBone Black as of this writing)

G2 Labs BerryNOS 1543 RED $125 Philips TDA1543 Balanced design, discrete output stage, power supply
BerryNOS mini $60 Philips TDA1543 Balanced design, discrete output stage
HIFIBerry HiFiBerry DAC €25 TI PCM5102A
HiFiBerry DAC+ €30 TI PCM5122 DAC volume control
IQAudio PiDAC $38 TI PCM5122 DAC volume control
PiDAC+ $42 TI PCM5122 DAC volume control, headphone amp
Saparel RaspiPlay3 $40 TI PCM5102A From Serbia
RaspiPlay4 [link] TBD TI PCM5122 DAC volume control, IR remote
Audiophonics I-Sabre DAC €25 ESS ES9023
I-Sabre DAC+ €43 ESS ES9023
Element 14 Wolfson Audio Card $35 Wolfson WM5102 Available through resellers. WM5102 is a complete audio system. The board implements line-in, line-out, speaker and headphone output and mic input. The board also includes a WM8804 providing SPDIF input and output, a digital microphone and expansion header for other Wolfson devices
TekDevice DACBerry2+ $45 TI PCM5102A
DACBerry3+ $51 ESS ES9023
HIFImeDIY ES9023 DAC $19 ESS ES9023 Lowest price!
DurioSound DurioSound $45 TI PCM5102A Has ultra low noise regulator (TPS7a47)
DurioSound Pro $70 TI PCM5102A Has ultra low noise regulator (TPS7a47) and Local Power Supply


  1. Notice that the DAC chips used are the ones that can cope without a Master Clock. RPi I2S does not Master Clock, so the DACs synch on bitclock and generate their own master clock.
  2. Products using PCM 5122 can use the DAC’s internal volume control and therefore can be connected directly to an amplifier.
  3. There are companies such as diyinhk and curryman that are not listed because they do not specifically make DAC boards that conform to the RPi footprint but are fully functional as I2S DACs. Any I2S DAC that does not require master clock will work.

My Favorite ones are the HIFIBerry DAC+ and the IQAudio PiDAC+, both based on the PCM 5122 with “hardware” volume control (meaning using the volume control in the DAC itself)






In the two years since we launched the current Raspberry Pi Model B, we’ve often talked about our intention to do one more hardware revision to incorporate the numerous small improvements people have been asking for. This isn’t a “Raspberry Pi 2″, but rather the final evolution of the original Raspberry Pi. Today, I’m very pleased to be able to announce the immediate availability, at $35 – it’s still the same price, of what we’re calling the Raspberry Pi Model B+. [link]

There are a million reviews on the Raspberry Pi. Here is one more but with a slant towards diyaudio…

New Layout (and more I/O pins)



Notice that the I2S pins are right next to a GND pin. This is particularly good as you can easily use twisted pairs (for noise immunity) when connecting to a DAC

List of integrated circuits [link]

Label Device Description
U1 BCM2835 SoC comprising ARM Processing core and Video Core. Data Sheet
U2 LAN9514 4 USB 2.0 Hub and 10/100 Ethernet controller. Data Sheet
U3 PAM2306AYPKE Dual DC-DC Switching converter. Data Sheet
U4 APX803-46SAG Brownout detector (reset generator)  Data Sheet
U5 AP7115-25SEG 150 mA Linear Regulator. 50 uV noise (Video DAC)  Data Sheet
U6 N.U.
U7 N.U.
U8 ESD5384 ESD protection for HDMI. Data Sheet
U9 AP2331W Current limited switch (for HDMI hot plug) Data Sheet
U10 AP7115-25SEG 150 mA Linear Regulator. 50 uV noise. (PWM Audio Driver supply) Data Sheet
U11 NC7WZ16 Ultra High Speed dual buffer. (PWM Driver) Data Sheet
U12 N.U.
U13 AP2553W6 USB current limited power switch (for hot plug). Data Sheet
U14 DMMT5401 Matched PNP transistors. Data Sheet

Board schematic here: [link]

The audio jack is also a composite AV jack


More USB Ports


New USB/Network Chip (to support the 4 USB ports)


The USB powerchain has a proper limiting switch and will not brown out the board if USB devices are plugged in when powered (or even if they try to take too much current or there is a fault like a power short). Default allowed USB current across 4 ports is 600mA, but can be increased to 1.2A via a config.txt parameter if a good quality 2A PSU is used. I have tried a few different USB hard disks and they all power fine directly from the Pi at the 1.2A setting. [link]

To increase power to 1.2A you add the following line in /boot/config.txt[link]

  • max_usb_current=1 (newer software)
  • safe_mode_gpio=4 (older software)

The 5V for the USB ports is provided directly by the 5V of the input supply. The schematic below shows the 5V sourced from Power In. There is a 2A fuse a diode-like low-drop polarity protection circuit and an over-voltage zener.


Therefore a better quality power supply is required. Here is an excellent post on choosing and evaluating 5V charger/supply [link]

I like the Orico DCX-2U. It has two USB outputs: 1×2.4A, 1×1.5A. The 2.4A output is plenty for a “fully loaded” RPi

High Efficiency Switching Supply (power consumption is reduced by between 0.5W and 1W)


The DC-DC Switching supply is the PAM2306AYPKE. This device supplies the 3.3v and 1.8v supplies. The switching frequency is 1.5MHz (which can easily removed by the LC filters on the outputs).


MicroSD Card Slot

There are many theories as to why the SD card was replaced with the micro SD card. I think it is probably lower cost.



According to the people from Raspberry Pi, the audio in the B+ model has been improved. The audio circuit (AUDIO out) incorporates a dedicated low-noise power supply (the input to this power supply is the external 5V supply). According to this comment [link]:

The B+ does not use use a switching regulator for its PWM driver, that would indeed be a bad design choice, instead it uses the AP7115-25SEG [link] low drop regulator with high power supply rejection ratio. It creates a noise free 2.5V for the NC7WZ16 PWM driver, the output of which is attenuated and filtered with two 100 Ohm resistors, and a 100 nF capacitor, so the output is 50 Ohm, and can reach 1.25Volt p/p.

U10 is the linear regulator and U11 is the “PWM Driver”


Whether this audio is “better” or not, it does not concern us. Take a look at this post [link].


Same SoC (Same ARM processor and GPU and 512MB of RAM)


Unlike the BeagleBone Black, there is no local memory for storage. The s/w runs out of the microSD card.

Same external 19.2 MHz crystal