Home > TEST > DSO QUAD Will be Shipping March 28 (or so)

DSO QUAD Will be Shipping March 28 (or so)

December 23, 2010 Leave a comment Go to comments

The first generation of this device will ship in March. This is a breakthrough device in that it lowers the entry point for a “decent” digital scope to half the price of the current entry level device (the $400 DS1052E). There is also a new digital scope that further lowers the entry level to $100, the JYE DSO 082. This device is also “pretty decent” with a claimed analog bandwidth of 10Mhz.

The other breakthrough feature is the open source nature of the project. Jusk like its little sibling the  DSO Nano, other people will be writing software for this scope, greatly enhancing its utility.

Seeedstudion offered a pre-order at a 20% discount (the pre-order has been sold out for quite a while, and the price is now back to $200) The Seeedstudio offering also comes with 2 mueller mcx osilloscope probe, 1 mueller mcx digital probe (see the pictures below). Other shops such as iTeadStudio and NKCElectronics will likely offer the scope as well.

Update 5/7/12: Updated h/w to version 2.7 This update is only to fit into the Al casing.

Update 4/12/11: Assembly instructions here: MiniDSO

Update 3/31/11: SeeedStudio has received their batch of 300 units

Update 3/28/11:

Seeedstudio has received only 2 of their initial order of 300. There will be a delay in shipping out the orders

[This image from miniDSO]

Update 3/22/11:

DSO Quad will start shipping next week: minidso post

Update 3/18/11:

Products are almost ready to ship. Seedstudio published hi-res pictures of the latest board. Here is side-by-side comparison between the original engineering samples (V2.2) and the initial shipping products (V2.6) (Left is old board; click for high res). The schematic for v 2.6 is from miniDSO and you can download the pdf here.

According to the developer, there has been 10 board revisions since v 1.0.

For reference, here are pictures of the first public prototype board (July, 2010)

And here is the schematic for v. 2.6

Update 1/25/11:

The “beta” should have most if not all of the h/w bugs fixed. There is a revision of the first engineering board soon to be distributed to the field (this “revised version” will be the version that Seeedstudio and others will ship). If there are no h/w bug reports, I think they will go ahead and make the “pioneering” run. Seeedstudio has also announced that they will overclock the ADC to support 72 MHz sample rate per each of the two channels. That means 14 MHz analog bandwidth (using the rule of thumb 5 samples cycle). If not, it should be good for ~ 10 MHz analog bandwidth.)

This is an example of open design and collaboration in China. The original source of the oscilloscope can be found in http://www.ourdev.cn (use google to translate -that’s what I do). I am sure Seeedstudio and iTeadStudio are part of that collaboration. That forum has 190,000 members and there seem to be access to all kinds of fast prototyping services and capabilities. It is kind of like “diyaudio” but on a industrial scale…

Follow the beta test progress (in English) here: iTeadStudio and here: SeeedStudio; and much more comprehensive information here: DSOQuad-Garden

Update 12/29/10:

Engineering samples are being delivered. There will be a round of testing and problems will be corrected before mass production. Below are images of engineering samples (clear casing); one has been affixed with the largest size battery.


(Collected from different places. Latest update: 1/19/11)

  • Hardware: CPU: ARM Cortex M3, ADC: AD9288-40 upgradable to AD9288-80, AD9288-100 and also low noise versions AD9218-40, AD9218-60, AD9218-80, AD9218-105, low noise [Upgradable at manufacturing as in OEM/ODM products]
  • Channels: Analog channel 2 ([CH_A] [CH_B]). Digital channels 2 ([CH_C] [CH_D])
  • Quad -Trace Display:
    • Trace 1: [CH_A], HIDE
    • Trace 2: [CH_B], HIDE
    • Trace 3: [CH_C], HIDE
    • Trace 4: [CH_D], HIDE, [CH_A] + [CH_B], [CH_A] – [CH_B], [CH_C] & [CH_D], [CH_C] & [CH_D], FILE_1, FILE_2, FILE_3, FILE_4
  • Channel calculations: [CH_A] + [CH_B], [CH_A] – [CH_B], [CH_C] & [CH_D], [CH_C] & [CH_D]
  • Input range: 20mV, 50mV, 100mV, 200mV, 500mV, 1V, 2V, 5V, 10V; maximum input voltage: 80V
  • Time scale: 1S, 500mS, 200mS, 100mS, 50mS, 20mS, 10mS, 5mS, 2mS, 1mS, 500uS, 200uS, 100uS, 50uS, 20uS, 10uS, 5uS, 2uS, 1uS, 500nS, 200nS, 100nS, 50nS, 20nS, 10nS
  • On-Screen Measurement: Peak Voltage “Vpp”, Average Voltage “Vdc”, Voltage RMS “RMS”, Voltage Max “Max”, Voltage Min “Min”, Signal Cycle “Cs”, Duty Cycle “Ds”, Signal Frequency “Fs”, Battery Voltage “Vbt”,” Screen refresh rate “FPS” and others
  • Synch: AUTO: Automatic, NORM: Standard, SINGL: Single, SCAN: slow scanning, NONE: real-time scanning
  • Trigger: Trigger channel signal source can be A, B, C, D in any of the four input selections, adjustable threshold trigger level (analog channel). Each trigger source (including analog and digital) can be selected as high, low, rising edge, falling edge, high pulse width greater than ⊿ T, high pulse width less than ⊿ T , low pulse width greater than ⊿ T, low pulse width  less than ⊿ T. Trigger Mode: Auto, Normal, Single, slow scanning, real-time scanning.
  • Sampling frequency: 30S/s to 72MS/s (36M +36 M) (MEGA samples per second). Using AD9288-40  ADC chip, single-channel maximum sampling frequency is 72M. The FIFO RAM has a maximum operating frequency of > 200M. Can be customized (or ordered to be customized) with the faster AD9288-80 ADC, or overclocking the AD9288-40 in order to achieve 72M +72 M sampling frequency, so that the maximum single-channel sampling rates can be up to 144M
  • Vertical resolution: 8-bit
  • Memory depth: 4096 points per channel; single-channel, 8192 points
  • Storage: 2MB internal storage (each screen capture is like 1K). Connects to PC as mass storage device. The designers did away with the SD card slot.
  • Screen: 3″ 240 × 400 widescreen color TFT LCD screen
  • Power: replaceable rechargeable  lithium battery. Can charge through USB connection or external 5V supply. 4 hr battery life in normal operation. May be upgradable to larger batter as long as it fits in the battery compartment. Can fit larger battery for 6 hr of operation
  • Signal generation: Square wave: 10Hz to 8MHz (20 frequencies?) of about 2.8Vpp signal source, adjustable 10 to 90% duty cycle . Sine wave, triangle wave, sawtooth wave: 10Hz to 20KHz (11 frequencies?) of about 2.8Vpp
  • Data capture: can save real-time bitmat screen image, DAT data file (current page and the full depth) and CSV data file (current page)
  • Measurement: Automatically measures Vmax, Vmin, Vpp, Vrms, Freq, Period, pulse width, duty cycle; manual cursor measurement: ⊿ T and ⊿ V
  • Open Source Design (H/W and S/W)
  • Size: 98mm (length) x60mm (high) x14.5mm (thick)
  • Weight: 80g (without battery)

Example of actual screen dump (from the engineering sample beta test)


When the frequency is low, the scope enters “scan mode”. In this mode, data is constantly acquired and displayed updating the screen from left to right. Each time the data buffer becomes full, the data is dumped to the screen, and new data is acquired and displayed again and again. Below is a screen dump of a 1 Hz waveform.


Example of Channel A (Trace 1)+Channel B (Trace 2) = A+B (Trace 4)

Example of comparing a trace (CH B) with a saved trace (FILE_2)

Some notes:

As a rule of thumb, the digital sampling frequency should be 5X the analog bandwidth of the scope, so for 72MS/s (single channel), the maximum effective bandwidth is 72/5~14MHz. The assumption here is that it takes at least 5 data points to represent an analog waveform. In practice, it will probable take more than 5 samples to represent an analog waveform, so 5 samples is the bare minimum. With this in mind, the DSO quad comfortably handle an upper frequency of 10Mhz.

Memory depth is an important parameter. Memory depth represents the maximum number of data point the scope can store to represent the trace of the wave form. If the scope is capable of 72 MS/s and the memory depth is 8192 points, then at maximum sample rate (at 72 MS/s digital or  ~ 10 MHz analog assuming this is the practical upper limit of the scope)  you can capture .11 msec of that signal. Obviously, as you lower the frequency, more of the signal trace can be capture.


  1. guglielmo
    January 12, 2011 at 22:29

    After test do you think that the beta test DSO will be usable or will be only a toy?
    In your opinion It’s better to waith the definitive version?

  2. Hifiduino
    January 13, 2011 at 06:16

    Hello guglielmo, Do you mean the initial batch that is being presold by Seeedstudio at a discount?. My feeling is that it would be pretty stable. These people can get a prototype out fairly quick, they are revising the board right now and a third batch will go out to beta testers. I don’t know at what point will they consider the the hardware to be final.

    Since I rely on google translator, I am not sure why are they revising the hardware, but most of the bugs have been s/w or the lack of some component that had not been populated on the board.

  3. guglielmo
    February 4, 2011 at 22:00

    I received this emailfrom SeeedStudio:
    “The hardware would not change between Beta version and Final version. But I can’t give you a 100% guarantee.
    The software might change a lot. The hackers can also make their own application. J
    Now I’thinking to buy my DSO. What do you think about?Do you have any new?

  4. BlogGeanDo
    February 4, 2011 at 22:08

    I plan to get one too, specially Seeedstudio is going to make them 72 MHz…
    BTW, they seem to be going fast… only 76 left out of 300…

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