CUBIEBOARD FOR AUDIO?
We’ll explore bit-perfect I2S output in the Cubieboards…
There are two current versions of the boards: Cubieboard2 ($65) and Cubietruck ($95) [link]. Both boards are based on the Allwinner A20 dual core processor.
A20 I2S SUPPORT
According to the A20 datasheet (p.20) [link] the chip supports up to 8 channels of I2S output: DO0 to DO3 represent the 4 stereo channels of I2S data.
The A20 User Manual describes the block diagram for I2S: The clocks for I2S are all based on “Audio_PLL” Master Clock.
Audio_PLL is the audio frequency clock derived from the 24MHz system clock. The PLL generates the 24.576 MHz and the 22.5792 MHz clocks. This means that the A20 is capable of bit-perfect playback for both the 44.1KHz and 48KHz family of sample rates.
The specification also lists the supported sample rates (44.1KHz to 192KHz) and the supported Fs
In Summary, the A20 processor has excellent support for I2S. All sample rates from 44.1Khz to 192Khz are supported. The processor generates the required Master Clock frequencies of 24.576 MHz and 22.5792 MHz through standard PLL processing.
CUBIEBOARD2 I2S PINS
According to the schematics [link] we find that the I2S pins are not connected to the expansion headers. PB5, PB6 and PB7 which are the Master Clock, Bit Clock and LR Clock are not connected.
Therefore, there is no support for I2S in the Cubieboard2
CUBIETRUCK I2S PINS
According to the schematics [link] we find that the I2S pins ARE connected to the expansion header C9. Notice that some jumper/resistors may need to be installed/removed.
In the lower part of the diagram (left side) shows the I2S signals corresponding to PB5-PB8 above. Shown also are the resistors/jumpers that are to be installed or removed in order to connect to the right side. Those connections corresponds to the CN9 header pins 18, 20, 22 and 24.
Notice that the default connection to pin 18, 20, 22 and 24 of header CN9 is to the TVIN signals (TVIN0 to TVIN3). In order to use the I2S signals, the jumpers need to be removed from the TVIN signals and installed in the I2S signals (I2S-MCLK, BT-PCM-CLK, BT-PCM-SYNC and BT-PCM-OUT)
Thus the I2S signals can be made available as follows:
- Pin 18 of CN9: Master Clock
- Pin 20 of CN9: Bit Clock
- Pin 22 of CN9: LRCK
- Pin 24 of CN9: Data Out
According to this post [link]. The modification to the resistors/jumpers are as follows:
remove R175 and set R174
remove R177 and set R176
remove R178 and set R179
remove R180 and set R181
(Only need to modify these for stereo I2S)
remove R183 and set R182
remove R185 and set R184
remove R187 and set R186
remove R189 and set R188
R175 to R181 are for the left side of CN9. Those connectors are for multichannel I2S. So for Stereo I2S only modding R182 to R189 are required.
You can see the surface mount resistors that need to be modified in the following photo and diagram. Seem pretty easy to mod.
Another option is just to connect a wire to the appropriated resistor pad and leave the resistors in their original position.
One more observation: Cubieboards are developed by a team of young engineers…
The A20 processor has excellent support for bit-perfect I2S digital audio. However, only the CubieTruck board allows access to the I2S pins.
Audio discussion on Cubie Forum: [link]