Interesting details of Weiss Implementation of ES9018

SYNCHRONOUS CLOCKING

The photos below shows the inside of the Weiss 202DAC. Notice that there is no local oscillator, the location/pads where the oscillator should be located is empty.

(photos taken from different sites in the internet. Japanese sites have the best pics)

I would suspect that the clock is provided by the audio interface chip (DICE chip) which derives its clock from its local oscillator as shown below

According to the specification of the DICE chip, the crystal frequency shall by 24.576MHz (section 3.1.1.1).  This frequency multiplied by 4 results in a frequency of 98.304MHz. According to Enjoy the Music, this frequency is what is used to “drive” the ES9018 chip.

According to Russ White [link],

The best thing to do if you desired a synchronous clock is simply to supply one that is an exact multiple of the incoming bit clock. But if you do both 44.1khz and 48khz based multiples that is going to mean two master clocks. The way to do this is to use the same master clock that is actually used to generate the bit clock (by division). I have implemented this using my XMOS proto board. It works quite well, but you still want a fairly high speed clock.

Operating like this allows the DPLL to basically free wheel. It does not even have to try to maintain a lock. 🙂

This seems to imply that sample rates may be resampled to 192K  (an even division of 24.576) and then sent to the DAC

People at diyaudio have been experimenting with synchronous clocking with great results. The other message here is that the forthcoming XMOS interface from TPA will allow this kind of synchronous clock interface which is favored by the likes of Weiss

C529 BATCH: SAME AS MY BUFFALO II 🙂

I think the batch number means week 52 of year 2009. Notice also the location of the Buffalo II DAC and compare to the Weiss implementation.

USE OF BUILT-IN FILTERS

I have been trying to access the programmable feature of the ESS DAC without any success. According to the review at Enjoy the Music,

1. About Filter A and B. These are stated to be “upsampling filters,” but no real detail is given in the manual. Are they similar to other manufacturers upsampling filters, i.e. one is for say 96kHz and the other for 192kHz Upsampling? Does this mean DAC202 cannot be set to bypass upsampling (44.1kHz native playback with oversampling only?).

Answer: The A and B filters are the ones used in the ES9018 DAC chip, i.e. the “factory presets” so to speak. In the ES9018 all input signals (independent of their sampling rate) are upsampled to about 1.5MHz. The B filter has a softer transition band than the A filter. We plan to add more filters to those two.

This leads me to think that even industry-leading edge people like ESS have not been able to use the programmable filter feature of the DAC. Weiss does say that they “plan to add more filters”, but right now it seems that feature is not available.

In any case, Stereophile published the response of the two built-in filters (left is the sharp filter)

WHY SO MANY RELAYS?

The relays are Panasonic TN relays.

The DAC202 has four selectable coarse analog settings and provide 1.06, 2.12, 4.15, and 8.15v at the analog outputs. These are related to the gain resistors at the output stage. The relays are there to select the appropriate resistor for the desired gain. In addition, there may be relays selecting the appropriate input pins for I2S and SPDIF (although you could permanently wire and switch between I2S and 3 other SPDIF inputs just by programming the registers in the DAC chip as detailed here [link])