The good people at Linn are doing the free-song-a-say Hi-Res Give away again this year [link]
Very nice Christmas present from Linn…
(missed the first few days…)
For US$10, it is a heck of a deal. [link]
Use of excellent padding, antistatic bag and silica gel.
Very nice USB cable and mounting hardware
INNOVATION and IMPROVEMENTS
Features implemented in the BUONO:
- Selectable voltage operation: 3.3V or 5V
- Better location for LEDs and reset switch, especially if you use a shield
- Higher power. Maximum of 1.8A for peripheral devices
- Cleaner AVCC. LC Low pass filter for the AVCC allows the ADC to be more accurate
- Easy access ground terminal to facilitate measurement and trouble shooting
Power is provided by the FP6182 DC-DC converter [link]. It can provide up to 2A of current
SDM microprocessor and high quality crystal oscillator.
I am not sure why use a Silicon Labs parts, except it may be less costly and does not require an external oscillator.
The USB MCUs feature an on-board universal serial bus (USB) 2.0 function controller with an integrated transceiver and on-chip clock recovery. No external resistors, crystal, voltage regulator, EEPROM or other components are required. On-chip resources include a high-speed 8051 CPU with up to 64 kB Flash, UARTs, SMBus, SPI, timers, counters and PWM generators. On-chip analog features include a multi-channel 10-bit ADC, voltage reference, internal oscillator, comparators and a temperature sensor. Available in 28-pin QFN, 32-pin LQFP or 48-pin TQFP packages, these devices provide a single-chip solution for embedded USB applications.
Additional information from the manufacturer: [link]
While testing a CM6631A interface, I discovered that for 44.1K/48K sample rate material, the bitclock was running at 128FS (rather than the more common 64FS). Thus when connected to a Sabre 32 DAC, it reported a sample rate of 88.1K/96K. I described the behavior as “2X bitclock” [link].
BLCK is the same for both 44/48K and 88/96K. This means that for 44/48K sample rate, the data is running at 128fs and for the rest of the sample rates, it is running at 64fs.
Even though the Sabre32 DAC specifies BCLK to be 64 fs, it appears that it also supports 128fs. Why? because when I play 44.1KHz material, the DAC reports 88.2KHz sample rate and it sounds perfectly fine. (The sample rate reported by the Sabre32 DAC is based on the frequency of the bitclock, the DAC reports 88.2KHz for 44.1K material)
C-Media, announced the availability of a firmware tool that allows the selection of the bitclock frequency and other parameters [link]
It creates a hex file when you click “Generate FW”. The destination folder must be the folder where the file “UsbDac.bin” (which comes with the config tool) is located
In order to “fix” the “2X bit clock” issue, you need to select x64 BLCK. For the DIYinhk board, you also need to select “Speaker” for Terminal Type and “I2S Format”
Then you need the “Firmware update tool” to upload the s/w to the CM6631A-based interface.
There is instructions included with the FWUpdate tool. If you need a copy, you can ask user tdtsai at diyaudio [link]
Once you update the FW with the x64 BCLK rate, the 44.1K/48K sample rate will correctly display in the Sabre32 DAC.
Diyinhk has a new version of this board that also takes advantage of the config tool to generate different versions of the firmware [link]
- The board has two I2S output is available. The diyer can flash the firmware and enable “Headphone I2S” (non-isolated) and “Speaker I2S” (isolated) if needed.
- The SPDIF (coaxial /optical) connection is routed out for diyer to mod (tap) if needed
When I asked HifiDIY if it would be possible to do some measurements on the board they were going to sell me (see here [link]), they agreed and they sent me the results. Here are the measurement results:
Source level, bit depth and sample frequency
- 0dBFS = 18.65dBu =0dBr, 24Bit/48kHz
- Spdif input
S/PDIF Input Lock Range (the only input to the board is SPDIF)
- Lower 30mV (P-P), 5nS Rise
- Typical 200mV (P-P), 60nS Rise
- Upper 2V (P-P), 100nS Rise
- 131dB, -90dBFS, A-Weighted
- 128dB, -90dBFS, Unweighted
0.0003% (-110dB) @ CCIF / 20kHz BW Unweighted
0.0001% (-119dB) @ SMPTE / 20kHz BW Unweighted
0.00065% (-104dB )@ 1kHz / 20kHz BW Unweighted
2.5uV RMB (-110dBu) @ 20kHz BW Unweighted
2uV RMB (-112dBu) @ 20kHz BW A-Weighted
-152dB @ 1kHz, -160dB @ 20Hz, -120dB @ 20kHz (Worst Case)
Deviation +/-0.1dB @ -120dBFS
Deviation +/-0.5dB @ -133dBFS
I am not quite familiar with these measurements. Thus, not quite sure how to interpret these numbers and how they compare with other DACs.
52pS (P-P) @ 5.1Hz Sideband
4.8pS (P-P) @ 42.1Hz Sideband
82dB (>10 000 Times Attenuate Jitter)
This is a breakthrough product/service for “hard to get” digital audio-specific frequencies.
Update: Schematic diagram [Prometheus MB SCHE]
Just received the Hifidiy ES9018 DAC.
HifiDIY has become the China distributor of ESS DAC products and has embarked in producing, in collaboration with ESS Technologies, a DIY-friendly version of the ES9018 DAC.
I was able to obtain a version of the board delivered with the optional components installed by the people of HifiDIY. The standard offering of the DAC board only includes the surface mount components as shown in the second photo below:
A DIYer is expected to select and install the remaining components (the output stage components, including the op-amps, the AVCC op-amp based supply and the decoupling capacitors of the on-board regulators). As can be seen, the designers opted to use through-hole components for wider diy appeal.
This is a “basic” implementation following the guidelines of the ESS datasheet but at the same time a vast improvement over the ESS evaluation board with respect to PCB material and choice of components.
Here is the DAC chip and the power lines decoupled with C0G ceramic capacitors. The chip has a date code of 033 (likely week 03 of 2013). Pretty new batch.
Some have negatively commented over the large distance of the decoupling capacitors from the pins. But as can be seen the photos the distance is not really “so large”. I believe a “diy-friendly” approach was more important to HIFIdiy than the potential “ultimate performance/measurement”. As can also be seen, there is sufficient clearance between the components for a diyer to solder or rework the DAC chip even with the decoupling capacitors in place.
The straight board trace from the bottom left is the spdif input line to the DAC chip
This is a very high quality 4-layer PCB with superb finish. Just for show, the 4-layers can be seen in this “window”. Front side of the board:
Back side of the board:
The 3.3v AVCC supply which is the most important supply for the DAC, uses a AD797 opamp (0.9 nV/√Hz noise) [datasheet:link]. It is implemented as a voltage follower per datasheet. The 3.3V reference signal is provided by the local 3.3V regulator.
- AD797: [Digikey: link]
- Electrolytic caps: 10uF, 50V. These are bipolar “TOWA” brand which are not available in the US market. Can substitute with any “good” electrolytic cap such as Panasonic FM or FR or ELNA SILMIC [Mouser: link]
- The decoupling capacitors are Vishay ERO MKP 1837 [link] 0.1uF, 160V. These ERO brand are not available in the US market. Vishay-branded MKP 1837 are available [Mouser: link]. These are pricey caps at $1.32 each. Can substitute with WIMA MKP2/4 for lower price.
The 3.3V reference voltage is further filtered with a CRC filter. Note also the compensation resistor for the opamp to prevent oscillation. This is indicated in the datasheet: “With the AD797, additional input series damping is required for stability with direct output to input feedback. A 100 Ω resistor (R1) in the inverting input (Figure 37) is sufficient; the 100 Ω balancing resistor (R2) is recommended but is not required for stability.”
Clock and clock supply is implemented with an ADP150 regulator [link] (Ultra low noise: 9 μV rms, independent of VOUT). The “LEJ” marking signifies a 3.3 Vout part. These parts are already installed in the basic configuration.
The input to the regulator is taken from the 5V external supply that also feeds the on-board 3.3V and 1.2V regulator. C5 and C5A are output capacitors for the regulator. Notice that there is no input capacitor except for the output capacitor of the 5V supply. Some improvement could be had by locating an input capacitor near the regulator and by ensuring the 5V external supply is well implemented.
The resistor (R5A) is to pull-up the enable line of the clock.
The Crystek CCHD-100 MHz oscillator [link] has become the standard for ES9018-based DAC implementations. This part is a “-50″ part meaning 50 ppm frequency stability. Other implementations have used a “-25″ as in 25 ppm frequency stability. Whether 25 ppm or 50 ppm, they all have the same jitter specification. Whether you can purchase a “-25″ or “-50″ parts likely depends on availability. A quick check on Digikey, shows that the “-25″ part is out of stock…
This board only supports a single input (and because it only uses DATA 1 (a single data line), it only supports spdif input).
One can select between the transformer-isolated (+/FG) or the non-isolated input (+/G), but can only use one input. The SPDIF input level is boosted by a TI LMV7219 comparator [link] to the 3.3V required by the DAC.
It is possible to support I2S inputs if one is capable of tapping to the chip pins. According to these photos, the remaining input pins are not connected to anything.
with steady hands and a proper soldering tip, it is quite possible to connect the I2S/DSD inputs to external wiring. (For now I think I would just leave it as is since i have other ES9018 DACs with proper output connections)
Shown below is a 30 gauge wire in comparison with the pins of the ES9018 chip
The board is designed to work without a microprocessor. In “hardware mode”, upon power-in, the chip defaults to stereo and “auto input” with SPDif input assigned to DATA1. Even though in this mode one can also use I2S input, I think ease of use/configuration was a desired design criteria for this board and therefore the other inputs were not been enabled. (Switching between SPDiF and I2S would require mechanical switching as DATA1 is shared between SPDIF and I2S).
However, the I2C inputs are available for software control such as for using the digital volume control and the selection of the built in filters.
ON BOARD POWER SECTION
In addition to AVCC and the clock supply, there are 4 additional on board supplies. From left to right:
Digital 3.3V for powering the DAC’s 3.3V supply, the spdif comparator and also as a reference to 3.3V AVCC; digital 1.2V for powering the DAC’s 1.2V supply; +12V and -12V for powering the output stage opamps, and the AVCC opamp. So in total, there are 6 local regulators.
Apparently it uses Panasonic FC capacitors (the gray ones). These are not available in the US. Apparently the supply of parts is much greater in that part of the world (where a lot of stuff is manufactured) -whether new or old stock or even special runs that the factories made. HIFIdiy made great efforts to obtain authentic parts, so I am confident that there are no questionable parts.
The aluminum electrolytic decoupling caps can be replaced with newer Panasonic FM or FR with the same or greater values. For example: Panasonic FR 220uV, 50v [Mouser: link]
With regard to the WIMA film decoupling caps, here is a link explaining the different series: [diyaudio: link]
The green ones appear to be WIMA FKP2 (Film and Foil caps) [link].
The input capacitor decoupling is the same for each regulator: an aluminum high value electrolytic capacitor with a low value film capacitor in parallel. The output capacitor decoupling varies, but they are equally effective. The two output film capacitors (red WIMAs) may not be required as each opamp already has local decoupling.
The 1.2 supply is a “lowly” LD1117 fixed 1.2V regulator [link]. It is implemented a per datasheet. The resistor (a 120 ohm shunt at the output) is a requirement for the 1.2V fixed regulator. I would have liked to see a lower noise regulator such as the LT1963.
It would be beneficial to increase the value of the output capacitor for this 1.2v regulator.
There are 8 LEDs indicating power supply operation and signal lock status.
The output stage is implemented as per the ES9018 datasheet. The only difference is that for the balanced output, it is buffered.
Use of top-notch components.
The opamps are the AD797 “B” grade (which is the higher grade of the AD797 opamp) and only available in SOIC packages. Thus the use of chip carriers.
HIFIdiy developed teflon PCB adapters for the SOIC opamps. According to them, this preserves the performance of the opamps.
Vishay 102K Foil resistors [link]. The decoupling capacitors are Vishay ERO MKP 1837 [link]. (ERO was an original ROEDERSTEIN brand). This brand of capacitors is not widely available anymore. Either these are old stock or only available in the Asia market.
The balanced output is buffered with a AD826 opamp [link]. “The AD826 is a dual, high speed voltage feedback op amp. It is ideal for use in applications which require unity gain stability and high output drive capability, such as buffering and cable driving. The AD826 features high output current drive capability of 50 mA min per amp, and is able to drive unlimited capacitive loads.”
On-board uP with volume control, display and rotary encoder
Amanero USB interface. Seems this is becoming the choice device interface for the ES9018…
Another data point (by Andrea Ciuffoli and QuangHao) showing that voltage mode output of the Sabre DAC is quite good [link]
This evening I have tested the following configurations with a my friend with lot of experience on audio reproduction and recording.
- Actual op-amp module (balanced with passive IV 10ohm)
- Satri design (balanced not suggested because it does not work good on balanced circuit)
- Raleigh Audio Line Stage clone with K & K Audio Basic CCS modules (balanced current mode with passive IV 10ohm)
- Un-balanced direct connection in voltage mode with only 2.2uF Z-Cap capacitor (0.1uF bypass MKP1837 as option)
- Lundahl LL1684 (balanced in voltage mode with OS-CON)
The last is the best.
(Transformer 1:1 configuration with center 10K // 2.2 – 22uF Sanyo OS-CON as described in the old Glass Audio article of Stefano Perugini: http://digilander.libero.it/paeng/a_24_bit_dac_full_article.htm)
Perhaps using the Lundahl transformer to convert balanced to single ended beats the unbalanced v-out mode (#4 and #5 above) because the balanced to unbalanced conversion gives you twice the voltage swing.
Seems that straight balanced output should be the same or even better than unbalanced output through a transformer because in the first case there is nothing in the signal path that can color the signal. I use the DAC in balanced voltage-out mode since my amp (UCD180HG) has balanced inputs.
Same author makes this claim in his blog [link]
It is possible to use the voltage output and after some listening tests with my friends I consider this configuration as the best.
In this case the output stage can be a transformer.
The last firmware allow to get an un-balanced signal output but you get only 1Vrms at 0dB.
You can read the previous post on this subject here: [link]
Both of my operating ES9018 DACs are used in voltage mode differential outputs to UCD180HG amp modules (connected with Cat5E patch cables)
MORE REPORTS COMING IN
To my knowledge, QuangHao and Andrea are the first “manufacturers” that have given a serious look at voltage mode output. As people start receiving their DAC, some are starting to compare V-out vs I-out modes. Here is one that praises the sonics of the V-out mode: [link]
FYI – I finally assembled my unit this weekend, and I must say that anyone who has not tried running the op-amps modules in voltage mode is doing themselves a rather large disservice. It seems to sound much livelier in voltage mode to me.
The Bass is the best that I have ever heard on my system. The soundstage is very large. Both Voltage and Current modes sound great. But I find that in voltage mode, the sound is just subjectively more “alive” sounding. I haven’t performed any measurements yet, so I don’t know if this is simply the result of possibly preferring higher distortion by running in voltage mode or not.
I just find that there is more of an emotional connection to the music in voltage mode using my op-amp modules. Plus there is amazing impact on transients such as bass drum.
Another V-out report [link]
I haven’t tried the opamp output stages yet but the LL1684 sounds so good that I wonder if I ever will get to it
Especially with high resolution recordings it’s remarkable, it’s the first DAC that I hear pianos playing like real pianos.
I use Foobar configured as here.
The Smashing Pumpkins have a reissue of “Mellon Collie And The Infinite Sadness” that’s available in 24bit/96kHz and some songs are very good
According to Dustin Forman, the designer of the ES9018 DAC,
… The current mode is simply when the current going in and out the pin of the chip is being sensed. This mode has the benefit of cancelling 2nd and 3rd harmonics of some of the internal analog circuitry.
The “voltage mode” is when the pin of the chip has a voltage that is being sensed. While this has the 2nd and 3rd harmonics (at the -100dB level or so), some people have even claimed this mode is more “tube-like”. It is all personal preference. [link]
Is it really just “personal preference”?
HIGH FREQUENCY (Out of Band) NOISE
The only concern with voltage out is the filtering of high frequency noise. This can be mitigated in several ways:
Passive filtering First order RC filter
This is what I’ve been using. The attenuation is “minimal” but I cannot detect whether the high frequency noise causes a problem or not (since I have no other filter to compare). However, according to TI [link], using a fist order RC filter is a feasible solution for removing out of band noise and actual measurements comparing a second order low pass vs a passive RC low pass shows no degradation in performance.
Passive Filtering High order LC filter
Abraxalito has been sharing a lot of work on high order passive filtering for DACs. You can check his blog here [link], and here is an example of a balanced mode 7th order LC filter
I have not have a chance to build/try one of these filters…
DAC settings to reduce HF noise
High frequency noise can be reduced by adjusting the quantizer setting in the DAC. According to ESS ,
The HF noise coming out of the DAC in 6bit mode is noticeably more than it is in 9 bit mode. DAC output seems to require less filtering. Running the analog section with a less aggressive filter has some nice benefits (better slew rate etc) to the final audio
In addition, a higher value quantizer setting seems to give better sonics [link]
Sonic difference, 9-bit vs 8-bit true differential (only register settings were changed)
Under 9-bit quantizer mode, the sound is less bold, and attacks are more solid, noises contained in recordings are more audible. Although those difference are very small amount and It required me repetitive comparison over and over.
Thus it seems that a pretty optimal configuration for the ESS DAC is:
- Vout mode with a simple RC low pass
- 9-bit quantizer setting
- Higher sample rate input [link]