Home > DIY HiFi > AKM Verita 4490EQ DAC

AKM Verita 4490EQ DAC

December 7, 2014 Leave a comment Go to comments

(12/22/14- Updated with information from AKM support engineers -see register section)

It has been a long time semiconductor houses invested in a flagship product. Wolfson announced the WM8471 in 2007 and ESS announced the Sabre DAC in 2008. Recent investment has been concentrated in DACs for the broad consumer industry especially for the mobile segment. It is good to see a company still interested in investing resources for the “audiophile” segment.



AMK introduced the AK4490 this year and has recently made it available in production quantities. It differs upon the AK 4399 DAC in the following areas (yes, the spec for Dynamic Range is lower in the new chip):

Parameter AK4490
 THD  -112 dB  -105 dB
 S/N (Mono)  123 dB  126 dB
 Max Sample Rate  768KHz  216 KHz
 Built-in Digital Filters  5  2
 Direct DSD (No conversion to PCM)  Yes  No
 AVDD Max operating voltage  7.2V  5.25V

Here is an overlay of the FTT measurement between the AK4490 and AK4399 (graph slightly shifted to the right to show the comparison) from the  evaluation board data sheets. As seen, the AK4490 has a slight edge over the AK4399:


Increasing S/N by 3 dB

In order to “recover” the lost S/N in the new device as compared with the old device, The AK4490 can be operated with an analog supply of up to 7.2V. At 7V  we gain 3dB S/N resulting in 126 dB for mono operation and therefore meeting the best specification of the old A4399 part.

Even though this is not documented in the current version of the AK4490 data sheet, it is documented in the AK4495 data sheet:


Thus one of the “mods” that can be made in this DAC is to run the DAC at the higher-end of the analog voltage operating spectrum.


Built-in Digital Filters

(images taken from Ayre’s paper [link]):

The built-in digital filters consist of 5 selectable filters. They include all the “popular” filters developed so far by different vendors plus one additional filter with undisclosed response (super slow roll-off). The filters are described as follows:

LPSRLinear phase Sharp Roll-off (AKM notation: “no delay”): this is the “standard” sharp roll-off filter found is all DACs. It is also known as the “brickwall” filter. It is said that pre-ringing sounds unnatural.

LPSlRLinear phase Slow Roll-off (AKM notation: “no delay”): this is also a “standard” filter found in all DACs. As in the linear phase sharp roll-off filter, it also generates pre-ringing, but trading lower amounts of pre-ringing with letting more aliased image through (theoretically increasing harmonic distortion).

MPSRMinimum delay Sharp Roll-off (AKM notation: “short delay”): this is also called the “minimum phase” or “apodizing” filter that was the rage a few years back. Whereas in the past audio engineers have insisted in phase linearity (meaning all frequencies have equal phase or delay), More recent research have shown that a “minimum phase” filter sacrifices some of the phase linearity (adds some phase distortion) for better time response. This filter removes all the “unnatural” pre-ringing but “dumps” all that energy to post-ringing. Implementation of this filter is also found in the Wolfson WM8741/8742 DACs

MPSlRMinimum delay Slow Roll-off (AKM notation: “short delay”): this is a “more modern” type of filter also found in the Wolfson WM8741/8742 DACs. In addition to eliminating pre-ringing, this filter also incorporates slow roll-off and this reduces post ringing as well.

The properties of this filter are similar to the “MP filter” found in Ayres latest CD player.

Super Slow Roll-off: this filter is the differentiating feature (in terms of built-in filters) that this DAC provides. The AKM literature says “super slow roll-off filter with emphasized characteristics” (which really means nothing). There is some information in the marketing page as shown below.

The marketing information says the following [link]


Native DSD Support

Supports 2.8MHz (64fs), 5.6MHz (126fs) and 11.2MHz (256fs) DSD

According to AKM, the volume control module and the delta-sigma modulator can be bypassed for DSD resulting in “direct” DSD rendering. The AK4490 contains an integrated low-pass filter specifically for DSD data. The ultimate specified performance for SACD (as described in the Scarlet Book) can be easily realized with a simple external analog filter.


Notice the bypass path for DSD Data. The DSD data is received by the DSD interface and sent directly to the “SCF” (Switched Capacitor Filter) block. DSD filter can be selected at 50KHz, 100KHz or 150KHz cut-off.

Other Comparative Features

Resolution32 bit32 bit32 bit24 bit24 bit

Parameter AK4490EQ  ES9018 ES9018K2M WM8741 PCM1794
DR (Mono) 123 dB 135 dB 127 dB 128 dB 132 dB
THD -112 dB -120 dB -120 dB -100 dB -108 dB
Max SR 768KHz 384KHz 384KHz 192KHz 192KHz
Output Mode Voltage V or I (best) V or I (best) Voltage Current
Resolution 32 bit 32 bit 32 bit 24 bit 24 bit
DSD Mode DSD Direct and DSD to PCM DSD to PCM DSD to PCM DSD Direct and DSD to PCM

Just like the WM8741, the AK4490 supports “direct DSD” processing bypassing the volume control and delta-sigma modulator. And like the WM8741, there is no automatic switching between PCM and DSD.

I2S and DSD shared lines

In order to facilitate the playing of both PCM and DSD content, it is desirable to have the same lines transmit PCM and DSD data. We find that in the AK4490, the I2S and DSD signals are shared. Here is a post I write earlier concerning shared I2S/DSD signal lines: [link]

The table below shows compatible DACs (DACs that share that use the same lines for DSD and PCM) and interfaces showing how the DSD pins are mapped to the PCM/I2S pins:

I2S Pins
ESS9018 [link]
PCM1795 [link]
AK4399 [link]
Amanero [link]
SDTrans [link]
XMOS Ref [link]
BCLK DSD Clock DSD Clock DSD Clock DSD Clock DSD Clock DSD Clock
DATA DATA Right Data Left Data Left Data Right DATA Right DATA Right

The AK4490 DAC follows the mapping of the AK4399 which switches channels with the “conventional” channel mapping of USB interfaces. Likely it was the USB interface designers that took notice of the ESS9018 DAC and conformed the channel mapping to that chip.

Fortunately, there is channel remapping in at least the Amanero interface and there is channel remapping in the DAC itself as specified in the following table of the data sheet:


MONO=0, SELLR=1 says:

  • Right channel input is mapped to Left channel output
  • Left channel input is mapped to Right channel output


I Just received diyinhk’s implementation of AKM’s new flagship DAC, the AKM AK4490EQ [link]. This is the first available diy board in the market (that I know of):



The Diyinhk implementation follows (mostly) the AKM evaluation board and data sheet [link] but maximizes performance whenever possible (like in the selection of capacitor type and value). The board is powered by: 5V line, 3.3V line and +/- 12V line (for the output opamp).


The general layout of the power traces, decoupling capacitors and ground planes also follows the data sheet:

Grounding and Power Supply Decoupling:

To minimize coupling by digital noise, decoupling capacitors should be connected to AVDD and DVDD respectively. VREFHL/R and VDDL/R are supplied from analog supply in system, and AVDD and DVDD are supplied from digital supply in system. Power lines of VREFHL/R and VDDL/R should be distributed separately from the point with low impedance of regulator etc. AVSS, DVSS, VSSL and VSSR must be connected to the same analog ground plane. Decoupling capacitors for high frequency should be placed as near as possible to the supply pin.

Analog 5V supply lines (can operate up to 7.2V according to spec)

The 5V supply connects to VDD (5V Analog supply input) and Reference Voltage High (VREFH) -as recommended in the data sheet.

The differential voltage between VREFH-L/R and VREFL-L/R sets the analog output range. The VREFH-L/R pin is normally connected to VDD (analog 5V supply), and the VREFL-L/R pin is normally connected to VSS1/2/3 (analog ground). VREFH-L/R and VREFL-L/R should be connected with a 0.1µF ceramic capacitor as near as possible to the pin to eliminate the effects of high frequency noise…All signals, especially clocks, should be kept away from the VREFH-L/R and VREFL-L/R pins in order to avoid unwanted noise coupling into the AK4490.

In addition, according to the eval board manual, a large value capacitor between VREFH-L/R (Analog 5v) and VREFL-L/R (GND) improves the THD performance in accordance to the following graph:



The Diyinhk board is implemented with 2200 uF capacitors, achieving the best THD numbers. (The larger capacitor  holds the reverence voltage stable -perhaps an even larger capacitor would further improve the low frequency THD numbers).

There is an option to use separate supplies for right and left VREF and VDD. This also follows the scheme implemented in the official evaluation board where the left VREF is separately powered from the right VREF.


Further, the AKM literature states:

Special designs techniques for sound quality are applied to each blocks for achieving balanced, smooth and powerful signal flow. In addition to L/R perfectly symmetrical layout, more than 5x trace width is used for signal line compared existing products, supplying rich current to analog signal output blocks. To achieve low impedance, two analog power supply pins and two signal reference pins are assigned for each channel, allowing the system to utilize thick PCB trace pattern giving low impedance sources.

The board takes advantage of this feature to use thicker lines for VREF and VDD

All 0.1 uF decoupling ceramic capacitors are C0G


The official evaluation board has a provision to separate the VREF from the Analog 5V VDD which is not implemented in this board. However, it is easy to mod and use separate supplies for VREF and Analog 5V VDD.

The evaluation board implements VREF with the following circuit:


3.3 V Supply Line (Analog 3.3V and Digital 3.3V)

There is a 3.3V analog supply pin and a 3.3V digital supply pin in the chip. The default implementation of the diyinhk board uses the same supply line but filters them with a ferrite bead. By removing the ferrite bead, the user can use separate supplies for the analog and digital 3.3V.


In the evaluation board, AVDD and DVDD are powered by separate regulators:




The ground planes follows the recommended separation between analog and digital sides (along pins 17-18 and 45-46)





The older device, the AK4399 supported a 3-wire serial interface. This seemed a not too widely supported protocol (it was not SPI and could not find a similar protocol in Arduino libraries , but one could code the protocol “by hand” as it was just a serial protocol -never tried it though)

Fortunately the new DAC supports I2C protocol (and maintains support for the original 3-wire serial interface found in older DACs). This greatly facilitating the interface to a microcontroller such as Arduino because of their built-in support for more standard protocols such as I2C and SPI.

The advantage of using the S/W interface is that it supports features such as volume control and DSD which are not available through the H/W interface.

The following table summarizes these features that are available in H/W interface (parallel interface -by pulling hardware pins up or down) and S/W interface (serial interface -microcontroller control).


Not indicated in the table is the “super slow roll-off” filter which is enabled by a register setting in s/w mode.


(Updated with information from AKM support engineer)

Here I summarize the register settings and the different functions that can be programmed. I also attempt to do some “translating” of AKM’s vocabulary to more “traditional” vocabulary.

I was able to communicate with AKM to clarify the functionality of certain sections.

Register address: 00 (Control 1)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Reset chip without initializing registers
|_|_|_|_|x|x|x|_| Interface mode: 16bit, 24bit, 32bit, I2S, LJ... (1)
|_|_|x|_|_|_|_|_| External digital filter clock: 768KHz/384KHz
|_|x|_|_|_|_|_|_| Enable/disable external digital filter mode 
|x|_|_|_|_|_|_|_| Master Clock frequency Setting: auto/manual (2)(3)

(1)- The only requirement for bitclock is >= 2x bit depth. Bitclock could be
32fs, 48fs or 64fs. Not limited to always be 64fs as in ESS DACs
(2)- Auto: detects master clock frequency and sampling frequency (44.1KHz,
96KHz, ...) automatically; sets oversampling rate (1x, 2x, 4x...) according to
input MCKL (this is kind of obvious).
Note: AKM calls sample rate "sampling speed" and assigns names to typical
sample rates: 44-48KHz="normal", 88-96KHz="double", 175-192KHz="quad"...  
(3)- Manual: manually set the sampling rate (44.1KHz, 96KHz...) Use reg 01 and
reg 05 for sampling rate setting. This means, in its simplest form, manually 
matching the sampling rate to the incoming data sample rate to use the highest
oversampling rate allowed by the system and thus obtain best noise performance.
This feature can also be used to select a different sampling rate (typically a
lower oversampling rate); for example, if selecting "normal" for 44.1KHz allows
8x oversampling (512fs), selecting "double" results in 4x oversampling (256fs).
This allows for experimentation with different oversampling rates and can be
used to tailor the sound for those inclined to lower oversampling or even no
oversampling. The use of lower oversampling results in higher noise for these 
kind of DACs. AKM indicates in the datasheet that using a lower oversampling
rate (512fs to 256fs) results in a decrease of S/N of 3dB.

Register address: 01 (Control 2)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Mute/unmute
|_|_|_|_|_|x|x|_| De-emphasis: Off, 32KHz, 44.1KHz, 48KHz
|_|_|_|x|x|_|_|_| Manual setting of sampling speed: "normal", "double"... (1)
|_|_|x|_|_|_|_|_| Short Delay/Traditional filter (Minimum/Linear phase)
|_|x|_|_|_|_|_|_| Zero data detect mode: Separate channels or ANDed channels
|x|_|_|_|_|_|_|_| Zero data detect ON/OFF

(1)- Manual sampling speed setting uses 3 bits. The third bit is in reg 05. 
See notes on register 00 for additional info on manual settings 

Register address: 02 (Control 3)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Filter cutoff slope: fast/slow
|_|_|_|_|_|_|x|_| MONO mode: left/right
|_|_|_|_|_|x|_|_| Invert output pin level on zero detect
|_|_|_|_|x|_|_|_| MONO/STEREO mode
|_|_|_|x|_|_|_|_| DSD Data on clock falling/rising edge
|_|x|_|_|_|_|_|_| DSD master clock frequency:512KHz/768KHz 
|x|_|_|_|_|_|_|_| PCM/DSD mode

Register address: 03 (Left Channel Attenuation)
 7 6 5 4 3 2 1 0
|x|x|x|x|x|x|x|x| Attenuation (1)
(1)- 256 levels, 0.5 dB each. 00=mute; ff=max volume

Register address: 04 (Right Channel Attenuation)
 7 6 5 4 3 2 1 0
|x|x|x|x|x|x|x|x| Attenuation (1)
(1)- 256 levels, 0.5 dB each. 00= mute; ff= max volume

Register address: 05 (Control 4)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Super Slow filter on/off
|_|_|_|_|_|_|x|_| Bit 3 of the manual sampling speed setting (see reg 01)
|_|x|_|_|_|_|_|_| Left channel phase invert ON/OFF
|x|_|_|_|_|_|_|_| Right channel phase invert ON/OFF

Register address: 06 (control 5)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| DSD bit 0 of sampling speed selection (bit 1 is in reg 9)(1)
|_|_|_|_|_|_|x|_| DSD Mode: Direct/Convert to PCM (2)
|_|_|_|_|x|_|_|_| DSD Automute release when Automute release is in "hold"
|_|_|_|x|_|_|_|_| Automute release: Auto/hold (3)
|_|_|x|_|_|_|_|_| Right Channel DSD flag when detecting full scale signal
|_|x|_|_|_|_|_|_| Left Channel DSD flag when detecting full scale signal
|x|_|_|_|_|_|_|_| DSD AutoMute: ON/OFF (4)

(1)- There is no facility for setting auto sample rate detection for DSD. The
use must detect the incoming DSD sample speed and match the sampling speed. 
Will have to experiment to see what is the effect of sample speed mismatch.
(2)- In DSD direct mode, the volume control and delta-sigma modulator are
bypassed. In PCM mode, it converts to PCM and uses volume control block and 
delta-sigma modulator. DSD direct with a combination of the internal filter
and simple output filter meets the filter specification of the SACD Scarlet
(3)- Automute condition disappears when data becomes under full scale
(4)- Automute condition is when data is full scale

Register address: 07 (Control 6)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| Synchronize ON/OFF (1)

(1) Synchronizes multiple DACs when used together in the same system. Read
data sheet for more information.

Register address: 08 (Control 7)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|x|x| Sound Quality Control Setting (1)

(1): Sound Control has 3 settings: "1", "2", "3". The AK4495 data sheet shows
additional settings "4" and "5". These setting refer to the 5 different filters
that are available in the DAC. They serve the same function as the filter 
selection bits specified in the other registers. What is unclear is which
register takes precedence.

Register address: 09 (Control 8)
 7 6 5 4 3 2 1 0
|_|_|_|_|_|_|_|x| DSD bit 1 of sample speed selection (see also reg 5)
|_|_|_|_|_|_|x|_| DSD filter selection when in DSD direct mode
  1. Russ White
    December 7, 2014 at 14:54

    I was given an eval board for the DAC about a year ago. I would say it is very good – but it’s ultimate performance is hindered by its voltage output arrangement. It’s actual dynamic range is less than the WM8741. Still I liked the sound coming out. It’s not at all bad.

    • BlgGear
      December 8, 2014 at 00:37

      Thanks for your comment, Russ. Seems everyone is going Vout. I think the “native” DSD processing could be good in this DAC

  2. December 7, 2014 at 15:42

    Seems to require external MCLK, correct? I don’t see an XO on the diyinhk board. So,a more complicated setup for something like a Raspberry Pi implementation?

    Also, does it switch automatically between PCM and DSD like the ESS 9018?

    And finally, you’re busy writing code to implement volume control, filter selection and an LCD for this new board, aren’t you BlgGear?? Aren’t you….. please….surely you can’t resist hearing those new filters!!

    • BlgGear
      December 8, 2014 at 00:39

      Yes, requires external master clock. Can’t work with RPi because it needs a master clock…
      In addition, it does not “automatically” switch between PCM and DSD, so it requires external detection of DSD signal and some programming.
      And I just got the board, haven’t written one line of code 🙂

  3. Derek
    December 8, 2014 at 01:41

    Let us know how the sound compares to the K2M And how you progress with the code…..;-)

  4. Anonymous
    December 15, 2014 at 22:02

    Hi, could already comment sound quality? 🙂

    • BlgGear
      December 16, 2014 at 17:26

      Have not built it yet… Soldering iron died…

  5. Mateo
    December 19, 2014 at 13:46

    Any updates?? Can You compare the SQ to ES9018?? 🙂

  6. Fab
    December 19, 2014 at 22:21

    The output LPF does not seem to be 3rd order as in the AKM data-sheet for PCM. Do we know why?

    • BlgGear
      December 22, 2014 at 21:11

      I think what is implemented is a simple differential summing circuit as shown in circuit 1 of page 62 of the datasheet. The 3rd order pass circuit in the datasheet is to meet the SACD Scarlet Book specification. The DAC implements and internal filter to attenuate the noise generated by the Delta Sigma modulator beyond the audio passband.

      • Fab
        December 23, 2014 at 01:14

        Page 62 example 1 shows 390 ohms resistors and 3 caps per channel and there is only 2 caps/channel and no 390 ohms resistors on the pcb…Example 1 is not only a summing circuit but also a LPF….

  7. Mario
    December 22, 2014 at 01:31

    Im about to get one. Any news?

  8. Fab
    December 22, 2014 at 03:03

    It sounds……..marvelous! Best dac board I had so far. Nothing to complaint.

  9. Mario
    December 22, 2014 at 11:48

    Hey Fab, what clocks are you using in this board?

  10. Fab
    December 22, 2014 at 14:24

    I am using the XMOS board also from Diyinhk which has 3 clocks.

    • Mario
      December 22, 2014 at 16:13

      Great! Gonna place my order right now!
      Do you know if one Xmos board is able to drive 2 AKM boards in mono config?

      • BlgGear
        December 22, 2014 at 21:03

        It should. Just duplicate the I2S connections to the second board and set the MONO channel accordingly.

  11. Fab
    December 22, 2014 at 16:34

    Sorry I do not know since I have not checked for that…

  12. Fab
    December 28, 2014 at 05:18

    I want to try the other digital filters (other than default) to check the effect on the sound. Do we know if it is configured in parallel or serial mode on the Pcb? PSN does not seem connected thus does it mean parallel mode?

    • Fab
      January 11, 2015 at 22:12

      I got confirmation from DIYINHK that the DAC on the board is set in parallel mode by default. As per my observation, the digital filter is actually set by default to “Short Delay Slow Rolloff ” which is the second best one (sharp edge) as suggested….the AK4490 doc is not that clear if we can set the filter for the “best one” thus “Super slow Rolloff ” in parallel hardware mode….

      • Fab
        January 11, 2015 at 22:35

        If I got it right it looks like we have to cut a trace on the back of then pcb where “SSLOW ” pin is already shorted to GND (“LO”) to get the Super Slow filter on by then adding a jumper to “hi”…, am I correct?

      • BlgGear
        January 12, 2015 at 15:53

        I’ll get back to you after reviewing my board and the datasheet…

      • BlgGear
        January 14, 2015 at 05:00

        It would make sense to pull pin 6 “High”, but the english language in the data sheet seems odd: “The AK4490 can be operated on a slower sampling frequency. This mode is available when the SSLOW pin =“H”.

  13. lintweaker
    January 3, 2015 at 14:24

    just got this board (after reading about it here, thx!). I am trying to get i2c working using a beaglebone black. So far it does not show up, what is the minimum of connections to be made to get i2c going (do I need to provice a MLCK)?

  14. BlgGear
    January 3, 2015 at 23:41

    I2C for control or I2S for audio? or both. And yes you need master clock

    • lintweaker
      January 4, 2015 at 08:32

      Yes, I2C for control. Sound is working fine, have not got I2C to work. Any pointers?

      • lintweaker
        January 4, 2015 at 09:31

        OK, got I2C working now!

      • BlgGear
        January 5, 2015 at 00:12

        Good to hear. Are you able to select the filters? Any impressions on the different filters?

  15. lintweaker
    January 5, 2015 at 13:43

    I have not played with the filters yet. Just basic PCM and DSD64 playback, next is DSD128, then some of the more advanced stuff 🙂

  16. Nikitas
    January 9, 2015 at 13:26

    Hi, any progress on the code?

    • BlgGear
      January 10, 2015 at 03:10

      Sorry, no progress. Had to order a new soldering iron. It is coming from China :-)…

  17. Anonymous
    January 10, 2015 at 01:06

    Im about to place an order on diyinhk’s PSU’s to use on 4490EQ. what do you think about the psu?

  18. Anonymous
    January 10, 2015 at 21:51

    Do you think its need to use separated rails to analog and digital?

    • BlgGear
      January 11, 2015 at 21:20

      In the evaluation board, AVDD and DVDD are powered by separate regulators. Should result in some improvements. You may want to build it as-is and then separate the AVDD from DVDD to evaluate the change. The kit makes it easy to make the change.

  19. M
    January 12, 2015 at 12:53

    I am also using DIYINHK stuff. Isolated XMOS + es9018k2m. Did not try AK4490EQ yet. I also used DIYINHK TDA power supplies. They are good, however only for digital circuits. I am using Twisted Pear shunts for es9018k2m: 3xTridents 3.3V, special Dual AVCC 3.4V (3.5V are said to burn the chip at high rez) and Palcid HD 2.1 of course. The results are much much much better than Diyinhk’s TPS7A4700 or ADM7150ARDZ power supplies. I am also going to try ak4490eq, however fist I am waiting for Dual AVCC 5.25V to drive analog sections for this dac. I already asked Brian from TPA to make one for me. He said, once he finishes his current work (they are testing new tridents shunts 🙂 ) he will get back into that. You could ask for the same …
    So eventually for ak4490eq powering I would use Twisted Pear Audio Placid HD 2.1 with
    Dual AVCC 5.25V for analog L/R, one trident 3.3V for Analog, one trident 3.3V for digital and one 3.3V trident for clocks on isoltaed xmos side. Transformer are also important, so e.g.: “toroidy pl audio supreme v2”. For Balanced to SE conversion I will use my current LL1684 transformers or maybe “lampizator amber tube stage”.

    • BlgGear
      January 12, 2015 at 16:01

      I didn’t know TPA would build custom voltage tridents. I would focus on getting a 5.x V Dual AVCC to power the analog 5V. Since it is dual supply, you can separate R/L. Also to consider is the large default capacitor used for analog 5V. For shunt supplies, smaller capacitors are recommended (ask TPA for max value). In the Buffalo implementation, there are no large capacitors after the regulators.
      If using the shunt regulators, you still need a regulated input source to the shunts.

    • Mario
      January 12, 2015 at 19:32

      But it starts to get kind expensive if its needed a source to use with shunts. Would be interesting if we could choose a 7V from TPA to use in analog path.
      M are you from Poland?

  20. M
    January 12, 2015 at 20:11

    “Also to consider is the large default capacitor used for analog 5V” – I obviously use none for my es9018k2m. Maybe I can think of using some small ones as you suggest.
    “If using the shunt regulators, you still need a regulated input source to the shunts.” – as I wrote Placid HD 2.1 is also needed.
    “But it starts to get kind expensive if its needed a source to use with shunts” – but it is worth it! More clarity, more depth, sounds have shape and is more “touchable”.
    “M are you from Poland?” – yep

  21. Abra
    January 20, 2015 at 09:08

    What I would be really curious how it sonically performs vs. ESS DACs.
    I have a Lampizator Amber containing ES9018K2M chip.

  22. Howard
    February 4, 2015 at 19:51

    Can anyone confirm if this dac supports dxd at 352.8 KHz ? The data sheet does not mention this rate, jumps from 192 to 385.

  23. Rob
    February 11, 2015 at 13:48

    Is anyone using Arduino With this board?

  24. Rob
    February 17, 2015 at 16:19

    Whoops, I meant to ask if anyone is using Amanero with this board, not arduino.

    • BlgGear
      February 18, 2015 at 04:42

      Should work… The Amanero outputs a master clock

  25. cps3113
    February 18, 2015 at 15:03

    Please Explain how to turn mono mode to connect two boards for dual mono.

    • BlgGear
      February 20, 2015 at 03:39

      See data sheet page 41. It says 10 setting for mono left and 11 setting for mono right. But it requires serial mode (program with Arduino)

      • Rob
        February 21, 2015 at 20:22

        I would like to use two boards for dual mono as well, but then doesn’t the external LPF circuit have to be changed?

  26. Sol
    February 18, 2015 at 18:37

    hello, how to play DSD, or has anyone i2c program arduino?

    • BlgGear
      February 20, 2015 at 03:47

      I believe it requires “serial” mode (ie, using an Arduino to configure registers). Look at page 49 of the data sheet. It shows the functions available in serial mode (software) and in parallel mode (hardware mode -manipulating hardware pins)

  27. Bostjan Kragl
    April 8, 2015 at 14:28

    Anyone compared Ak4490 with ES9018K2M for sound?

    • Bostjan Kragl
      April 9, 2015 at 14:24

      Nobody? 🙂
      I have Es9018K2m combo Xmos from DIYINHK with AD797 op-amp.
      Nice, live and neutral sound.
      I wondering if AK4490 has better SQ.

  28. M
    May 19, 2015 at 07:36

    So I have tried es9018k2m, ak4490, ak4495. All of them with triednts shunts and placid hd 2.1. All of them worked with lundhal transformer as output stage. Only ak4495 worked with Lampizator Balance SE tube output stage, because it does not generated dc offset. All of them worked however with lampizator amber tube output stage. I like ak449* better than sabre. Maybe sabre would work better without asrc (do not know, did not try). Anyways my best combos so far is: ak4495 + salas refelector D + lampizator balanced SE.

    • Tomek
      November 30, 2015 at 20:22

      Hello, pozdrowienia z Polski.
      Czy m ożesz podać maila, chciałbym pogadać o twoim dacu.

    • April 8, 2016 at 06:04

      Dear M, thank you for posting your comments about the es9018km, ak4490 and ak4495. Which ak4495 are you using ? The diyinhk ?

    • April 17, 2016 at 01:48

      Please excuse the noob question. Interested in feedback about:
      WaveIO or JL Labs USB to I2S > DIYINIK AK4495 or ES9018 with Salas refelector D ?

      Thank you !

  29. BRG
    July 20, 2015 at 12:01

    I am a hardware guy an have designed a lot of DACs since early 80s. But I have realized that one has to learn the software part to get what you want this days.
    So I have to say that I am pretty bad on that part.
    Anyway I am trying to get I2C control to work with this board. No luck so far. My question is.
    My arduino finds the device at 0x11. But in the datasheet AKM says that the address is
    00100 CAD1CAD0 R/W and it should be for CAD1=0 and CAD0=1 and R/W=0 to write to the device 00100010 and that is 0x22 what is correct in this case?
    OK I thought I could try both and send

    Wire.write(0x00); // move pointer to control1 address
    Wire.write(0x0E); // sends 0x0E (hex) 00001110 (binary)

    To change the setting to I2S 32bit but still no sound
    It is DIYINHK USB>I2S attached to it.
    Can someone point to the right direction?


    • BlgGear
      July 22, 2015 at 02:41

      Here is an explanation I wrote in the Sabre code:

      The device address of Sabre DAC Datasheet specifies the address as 0x90 which is an 8-bit value.
      The wire library in Arduino uses 7-bit device addresses and the 8th R/W bit is added automatically
      depending on whether you use the write call [beginTransmission()] or the read call [requestFrom()].
      Therefore, you will use the 7 most significant bits of the 8-bit address.
      In our example, 0x90 becomes 0x48 as follows:
      0x90: 0101000 (we eliminate the rightmost bit)
      0x48: 0010100

      In the AKM DAC:

      CAD1 and CAD 0 pin is grounded so =0,
      The 7 bit address is therefore: 0010000 or 0x10 (or 0x11 if you pull CAD0 high)
      The R/W code is inserted automatically depending if you are writing or reading.
      For the value you want to write to register 0, check page 54 of the data sheet.

      Try different values…

  30. Anonymous
    July 22, 2015 at 12:20

    First of all I have to thank you answering my questions.
    I realized that it was 0x11 when I read your K2M code yesterday.
    CAD0 goes to high with a stripe on the bottom side of the board. I didnt want to cut it so 0010001 (0x11).
    I could set the registers and read them afterwards to verify the change.
    What I am missing is some kind of reset after I setting the new values. I suspect that it is the reason I dont get any sound on the output.
    But as you said I will try different values. My thought was if someone here has done that before maybe I could save some time.
    Thank you very much one more time.


  31. September 25, 2015 at 18:04

    I got this up and running the other day. My build included a http://hifimediy.com/i2s-DSD-isolator, and sparkos lab dual discrete op amp. I’m using my gustard u12 as a transport. Sounds great.

  32. waller
    December 28, 2015 at 16:07

    anyone try the akm4497?

  33. cubano
    December 29, 2015 at 08:07

    i want control the dac ak4490 with i2c, but my arduino not detect it. on the card,i configured the pin psn=L and i2c=H. i plug cable sda and scl on the card. someone managed to control the dac with i2c?

    • cubano
      December 29, 2015 at 13:22

      I found why the dac did not answer. It must also connect the gnd pin of SDA and SLC.

      • unixdeveloper
        March 8, 2017 at 17:25

        I am starting to refactor the code to work with AK4490 and just completed the hardware. Would appreciate if anyone who has refactored the code to work with AK4490 can share it – Work in progress code is fine too. Thanks!

  34. Anonymous
    January 1, 2016 at 11:49

    Still no way to make this work with Rpi 2 ??

  35. themystical
    April 22, 2016 at 11:33

    Anybody have any Arduino Code for this? I would prefer to start with a base rather then from scratch?

  36. themystical
    May 22, 2016 at 05:07

    Dual Mono wiring configuration for a Vout DAC
    Can somebody please help me with the correct configuration of a wiring the analogue outputs of a dual mono Vout DAC?
    I know for a current output DAC its a parallel connection,the Right + is connected to Left + and Right – is connected to L-.
    Instinctively, the connection for a Vout DAC is a series connection? ie. R- connected to L+?
    However the AKM 4497 Page 94 Datasheet seems to show a parallel connection, same as a current output DAC?
    For a series connection would I need to invert one of the channels in serial mode?

    Click to access AK4497EQ.pdf

  37. September 14, 2016 at 16:27

    knoxville bed bug exterminators

  38. September 14, 2016 at 18:52

    marine repair

  39. chen. chang yen
    January 6, 2017 at 03:27

    May I ask how to make AK4490 work with RPI3?
    I got a RPI3 , an AK4490 board from DIYINHK, and a external TCXO at 24.576Mhz for MCLK.

    I connect them together, and there is no sound out.
    Is it the driver problem of volumio or else?

    • John
      January 22, 2017 at 10:55

      I have the AK4490 working with RPi2 via an Allo Kali reclocker which can provide the MCLK. I’m using the ‘Mamboberry DAC+’ setting on Moode and upsampling to 24/96.

      • John
        January 22, 2017 at 22:30

        Just adding a warning that at some settings (eg. resampling ‘off’) you can get an extremely high-level blast of noise that your speakers may not like.

  40. March 29, 2021 at 23:07

    Great that’s always my policy too. Happy reading

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