Home > USB AUDIO > C-Media CM6631A-based USB-I2S Interface

C-Media CM6631A-based USB-I2S Interface

Got a hold of  DIYINHK’s C-Media based USB-I2S interface a while back, and it is just now I got around writing something about it.

This is based on the newest USB2 audio chip on the block, The C-Media chip is the CM6631A. This version in turn is the newer, the “A” version of the CM6631 chip which has been implemented in several recent products. The CM6631A differs from the more common (and older) CM6631 in that it supports 176.4KHz sample rate. All other features are the same as the CM6631.

According to the product info page [link]:

USB 2.0 Asynchronous operation (every one does this nowadays)

Up to 192KHz / 32bit

Very capable set of input/output (the implementation reviewed here only implements USB input and I2S output)

  • 2 pairs I2S or Left-Justified serial audio output interface
  • 2 pairs I2S or Left-Justified serial audio input interface
  • Built-in 192K/176.4K/96K/88.2K/48K/44.1KHz and 16/24-bit SPDIF transmitter
  • Integrated 192K/176.4K/96K/88.2K/48K/44.1K and 16/24-bit SPDIF receiver
  • Supports SPDIF IN-to-OUT loop-back path for signal transforming between TOSLINK and RCA connections


I was able to find an older version of the datasheet for the CM6631 which is pin compatible with the DM6631A [CM6631_Datasheet_v0.8]

It can be seen from the specifications that a more capable system can be developed. For example, a 4-channel I2S output driving two DACs. (allowing performing digital crossover functions in the PC)

DIYINHK USB Interface: CM6631A (with the “A”)


Bottom. Uses the CM6631A


The vendor provides a device driver [link]

Other sources: the latest version of the driver is a unified version for the CM6631 and CM6631A devices, thus available from other manufacturers using either the 6631 or 6631A part (likely they all offer the same versions. some manufacturer may be faster than others in offering newer versions):

I tried the Emotiva provided driver and it works. Here is a screen shot:



There are two versions of the firmware as discussed here [link] and here [link]. However, these versions seem to be related to the SPDIF features of the chip. For this board, which only supports I2S, I don’t think these versions of the firmware matters. Note: according the tdtsai [diyaudio], the developer for the driver s/w, the firmware for the CM6631 is not compatible for the CM6631A.

  • Firmware 0101 PID 0x0319 can output to SPDIF via CMedia ASIO, but it will never passthrough DTS and AC3. I2S and SPDIF-Out work simultaneously
  • Firmware 0108 PID 0x0314, using current drivers, will not output to SPDIF via ASIO, but it can passthrough DTS and AC3 correctly. I2S and SPDIF-Out are reported as different devices (so one output at a time depending on which one you choose)


Two ultra low noise regulators: the TI LP5900 [link]

Uses high frequency 45.1584 MHz and 49.152 MHz oscillators to derive the audio frequencies (the manufacturer indicates that these are sourced from Digikey, thus ensuring their quality). This is unique as most devices use half that frequency or lower.

No markings? According to the datasheet, this seems normal. The product number is in the box or reel.

The oscillators output are available to be used as master clock for the DAC. The higher speed oscillator are in the “sweet spot” frequencies for ESS Sabre DACs for synchronous operation.

Since the board does not switch the clock lines, you can only select one of the clock lines to feed the ESS DAC. In this manner, with some of the sample frequencies the DAC will operate in synchronous mode and with other sample frequencies, in the normal asynchronous mode.

For example, if you chose to use the X45 line (45.1584 MHz) as the clock for the ESS DAC, then when playing 44.1K, 88.2K and 176.4K the DAC will operate in synchronous mode and when playing 48K, 96K and 192K, the DAC will operate in asynchronous mode.

You could manually switch the clock lines but this is not only impractical, but it could also upset the DAC requiring a reset.

Easy bypass of USB power. CAUTION: Maximum input voltage for the local regulators is 5.5V

According to the manufacturer, the design employs solid ground plane (a must for high speed digital circuit) and no vias in active circuit (via inductance always create jitter problem). This is apparent from the photo below and in comparison with other designs. The overall layout is very clean and compact.

Datasheet: [link]


The datasheet for the Xpresso clocks is actually very extensive, and the jitter measurement is equally extensive. The phase noise plot is included. I have shown here the comparison with the Crystek CCHD-950-80 MHz which is the oscillator I have in my version of the Buffalo II DAC:

Using the 62,5 MHz curve, we get a phase jitter value of 6 psec RMS (10 Hz – 1 MHz). The Crystek CCHD-950-80MHz has a jitter value of about 2 psec RMS. However, at the lower offset frequencies (the ones of interest to audio performance) the phase noise is not very different from that of the Crystek clock which is a good thing.


There is something “a bit odd” with this interface: According to the specifications:

16/24bit 44.1kHz 5.6488Mhz 11.2896Mhz
16/24bit 48kHz 6.144Mhz 12.288Mhz
16bit 88.2kHz 5.6488Mhz 22.5792Mhz
16/24bit 96kHz 6.144Mhz 24.576Mhz
16bit 176.4kHz 11.2976Mhz 22.5792Mhz
16/24bit 192kHz 12.288Mhz 24.576Mhz


BLCK is the same for both 44/48K and 88/96K. This means that for 44/48K sample rate, the data is running at 128fs and for the rest of the sample rates, it is running at 64fs.

Even though the Sabre32 DAC specifies BCLK to be 64 fs, it appears that it also supports  128fs. Why? because when I play 44.1KHz material, the DAC reports 88.2KHz sample rate and it sounds perfectly fine. (The sample rate reported by the Sabre32 DAC is  based on the frequency of the bitclock, the DAC reports 88.2KHz for 44.1K material)

The sample rate for the higher sample rates are reported correctly by the ES9018 DAC.

Is this a “common” feature supported by other DACs?

The AK 4399 supports both a 64fs and a 128fs bitclock:


The Wolfson 8804 also supports 128fs Bitclock -in DSP mode (p. 44):


So it seems that a 128fs bitclock is not so strange after all. I am not sure if any other dacs support 128fs bitclock, but the Sabre32 DAC definitely does.


C-Media has been in the computer audio business since its inception. According to their website, their world’s first accomplishment are all related to audio. Its claim to fame is probably the ASUS XONAR series of PC audio cards and interfaces. The latest ASUS XONAR ESSENCE ONE uses the CM6631 part as shown here (There is a review of the Essence One here: [link]):

The Schiit DACs also use the CM6631 part for their USB option board. As discussed here [link] it does not support 176K material because of hardware limitations in the 6631 part. The “A” part supports 176K sample rate.

The Emotive XDA-2 reportedly also uses a CM6631 chip for the USB interface [link]


The MHDT USB Bridge also uses the CM6631 chip [link]


Have yet to see any commercial implementation using the CM6631A part.


diyinhk turns his designs very quickly. This version of the board has been replaced with a new version having isolated I2S [link]



There are some reports and fixes to ensure USB2 compatibility with Macintosh computers: [link] with certain CM6631-based implementations.

This board does not suffer from the reported problem: there are no 3-pin devices near pin 98 of the chip.


Plugin this device into a Macintosh computer shows that it is indeed a high speed USB 2.0 device as shown in this snapshot of the CMEDIA device under the USB description screen


Here is a reported test of the CM6631A (implemented in a different device) showing jitter measurements with and without processor load and comparing the asynchronous nature of the USB communication vs a device using USB adaptive communication. [link]

In his conclusion, this device (as well as other USB-asyncrhonous devices) show great immunity against processor loading:

Bottom Line: Don’t worry about jitter! It’s more than likely inaudible in a modern computer system and with decent (not necessarily expensive) audio gear. I see no evidence that high CPU/GPU load makes any difference to jitter. Isolating your DAC from electrical noise polluting the analogue output seems much more important.

  1. Anonymous
    April 3, 2013 at 18:42

    Do you think it would be possible to modify this device to use both clocks, i may be incorrect, but i think you may have modified the amanero in one of your post, because both clocks were active at the same time?

    • BlgGear
      April 3, 2013 at 18:59

      The Amanero controller also controls the enable pins of the clocks and the two outputs of the clocks are connected together to form a single clock output/input to the controller. Thus you only get the clock that is enabled.
      The diyinhk board/CM6631 doesn’t seem to have that facility.

      • BlgGear
        April 3, 2013 at 21:28

        Actually the Amanero has two clock inputs but it also control the enable pins of the clocks, thus only having one clock operational at any one time. I’ll double check the implementation of the CM6631 part…

  2. Percy mistry
    April 3, 2013 at 20:39

    So by “I2S” does it mean it supports “receiver as master” also (meaning master clock going into transmitter) ? Or “transmitter as master” only ?

    • BlgGear
      April 3, 2013 at 21:41

      Yes, “receiver as master”. According to the datasheet, the master clock in the receiving ports is a master clock output.

  3. Bunpei
    April 23, 2013 at 06:17

    Your observation on BCLK frequency 128fs is very interesting. Have you observed SDATA on oscilloscope? Do the SDATA bits end early in the middle of channel frame? Do you play the 44.1 kHz/16 bit source on OSF=ON mode? Have you tried OSF=OFF mode?
    I don’t think the DAC has recoginized it as 88.1 kHz source. Your calculation formula that includes factor 64 just gives 88.1 kHz from DPLL_Num register values.

    • BlgGear
      April 23, 2013 at 16:33

      Hello Bunpei,
      Have not observed the data in a scope. I was assuming that they would just “truncate” at 24 or 32 bit… Have not tried OSF settings. As you said, the DAC is reporting what it sees in the bitclock based on the calculation of the DPLL num.

      I had asked the developers and they did confirm running it at 2x bitclock for “compatibility to some DAC”.

      • Bunpei
        April 25, 2013 at 10:38

        Thank you very much for your answers! Why don’t you report your finding on diyAudio ESS Sabre thread?

      • BlgGear
        April 25, 2013 at 16:01

        I am not sure what are the implications on “double rate I2S”, except that the DAC will be reporting the wrong sample rate…

  4. May 3, 2013 at 07:41

    Do you know of any using this chip that has i2s input pins ?

  5. Jorgi
    June 18, 2013 at 13:15

    Where can I buy this board? Will this PCB work with TDA1541A via i2s? Thanks

  6. emueyes
    September 19, 2013 at 05:25

    Are these the same thing as the eBay units eg http://www.ebay.com.au/itm/CM6631A-USB-daughter-card-/400546928958?pt=DE_TV_Video_Audio_Verst%C3%A4rker_Teile&hash=item5d4275193e&_uhb=1

    I’m sorry to sound like such a clueless noob but that can’t be helped, it’s accurate. I’m really asking if one of those eBay units can be used as a soundcard, given the proper drivers.

  7. WarMonkey
    November 26, 2013 at 05:03

    does any one have CM6631A firmware configuration tool? i need 192k/24bit i2s input but i can’t find a usable fw.

  8. Dida
    December 19, 2013 at 14:45

    I tried to use 6631A based USB-to-I2S with Jack on linux (Mint and Ubuntu) but it seems that Jack cannot go beyond sampling rate of 48KHz. Any idea what to do?

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