Amanero Bit-clock Re-clocking: Results
SAMPLE RATE TEST
Used the Windows control panel (to generate a test tone) and high-res music files to test the following sample frequencies. The DAC (with HifiDuino software) validated the sample rate being received.
- 44.1 KHz (also tested with music file this sample rate)
- 48 KHz
- 88.2 KHz
- 96 KHz (also tested with hi-res music file of this sample rate)
- 176.4 KHz
- 192 KHz (also tested with hi-res music file of this sample rate)
I wasn’t able to test 352.8 KHz files on the Amanero. Not sure if it is the mod or the Amanero board. Previously I did not test high-res files on the Amanero board and, in addition, the control panel does not say that 352.8 KHz and 384 KHz sample rates are supported as shown below (there is no check-box)
This test also confirms that the CPLD in the Amanero board indeed toggles the enable lines of the oscillators depending on the input sample rates to allow only one oscillator operating at any one time. This makes the MOD possible as the flip-flop only has one clock signal input. Had the clocks been operating at the same time, then only one frequency family could be supported. Playing a song of the other sample rate family would have required manually switching the clock signal.
RESULTS OF UNLOCK TEST
For reference, here are all the tests plots I’ve done in the past. The time dimension of the plot correlates to the actual time of day. Although during the midnight hours there are practically no unlocks, during the morning hours the unlocks increase and sometimes they are worse than what is shown in the graph.
The firs plot corresponds to the Amanero board as delivered from the factory (click for larger size).
The following plot corresponds to the Amanero board with large input capacitors to the regulators.
This plot corresponds to the Amanero board with large input and output caps for the regulators.
Here is the plot adding the bit clock re-clocking mod.
I think there is some improvements. In all cases, the unlocks in the morning hours correspond to the start of electrical activities around the house.
I continue the measurement and did it until 6:00 PM. In the past, I did not continued the test after the morning hours because the unlocks seems to happen all the time, and thus I stopped. However, the afternoon plot looks very clean except for a burst of unlocks around 9:00 AM which also coincide with other members of the family getting up and starting another round of electrical activity. Seems once the DPLL of the DAC is disturbed, it takes some time for it to stabilize. In any case, the plot does look cleaner overall than what I have observed in the past. I think there is marked improvements.
The “burst” behavior is very strange. Even though it correlates to electrical activity, at other times of the day there is even more electrical activity but no unlocks.
Let me repeat what I said already that this has been a most satisfying modding experience…
- Education: I got to learn about flip flops.
- Cost: the only new part I purchased was the Potato Semi flip flop for $3. But even if I had to buy everything, the entire cost would still be < $10
- Looks: this mod came out looking like a professional job🙂
- Recycle: The small resistors for tapping the clock lines came from old VCR.
Some shielding of the wires may be advisable…