Teensy 3.0 (with I2S Interface) -Build your own SD-Card Transport?
(Update 4/16/14): The audio library was released in January 2014. Discussion here [link]
(Update 11/15/13): Discussion on gathering requirements for an audio board: [link]
(Update 9/13/12): This board has been designed with audio in mind.
I posted a question to the designer of the board:
For good quality audio applications, the I2S capability got my attention. Perusing from the chip documentation, there is support for getting the I2S master clock from an external clock (rather than derived from the system clock). Does Teensy support this capability? Thanks.
This was his answer:
@hifiduino – The I2S with DMA, and USB host, were the major factors why I waited for this chip, rather than going with one of the many NXP parts that are appearing as ARM-based projects lately. The chip can accept external clocks. It also has options to sync both transmit and receive to the same clock and frame sync pulses, so you can get both input and output using only 4 I/O pins, plus 2 more I2C to configure it.
In fact, for the audio shield I’m planning, I have a codec chip in mind that has a configurable PLL to create all the necessary clocks. I really don’t like to promote “vapor”, so at this point I’m not going to comment much on those audio shield plans, other than I definitely do have something in mind. Realistically, it’ll probably be 2-3 months until I really work on that shield and audio processing libraries.
I think we can expect good things (for audio) from Paul Stoffregen for this board
New Arduino-IDE compatible development board from the Teensyduino people (the company is officially called “PJRC”)
You can reserve one now for $22
- 32 bit ARM Cortex-M4 48 MHz CPU (M4 = DSP extensions) Kinetis MK20DX128VLH5
- 128K Flash Memory, 16K RAM, 2K EEPROM
- 14* High Resolution Analog Inputs (13 bits usable, 16 bit hardware)
- 34* Digital I/O Pins (10 shared with analog)
- 10 PWM outputs
- 8 Timers for intervals/delays, separate from PWM
- USB with dedicated DMA memory transfers
- 3 UARTs (serial ports)
- SPI, I2C, I2S, IR modulator
- I2S (for high quality audio interface)
- Real Time Clock (with user-added 32.768 crystal and battery)
- 4 general purpose DMA channels (separate from USB)
- Touch Sensor Inputs
More here: [link]
The I2S interface is part of the audio capability provided by the processor. The main chip is Freescale’s “Kinetis” K-series. The application note “Audio Output Options for Kinetis” describes the audio path capabilities of the chip:
In theory one can put together an SD-card transport with I2S output. Hopefully some good programmers will take on the project and share the code. If the Teensy people would provide sufficient functionality in the libraries, then anyone will be able to develop a transport
The “An I2S Application for Kinetis” document describe the I2S interface and where the clock can be derived:
Section 3.1 describes the selection of the the clock source
In order to use the I2S module, first of all, configure the clock for this module. If I2S is working as a master, the clock source of this module must be decided by setting the I2SSRC field in the SIM_SOPT2 register, or SOPT2[I2SSRC]. The possible options include:
- Core/system clock divided by the I2S fractional clock divider
- MCGPLLCLK/MCGFLLCLK clock divided by the I2S fractional clock divider
- OSCERCLK clock
- External bypass clock (I2S_CLK_IN)
The user can choose one from the above list according to the requirement.
The obvious choice would be “External bypass clock (I2S_CLK_IN)”
Maximum I2S Master Clock frequency
- According to the Reference Manual page 144, the maximum frequency for the I2S master clock is 25 MHz.
- According to the Technical Data Sheet page 20, the maximum frequency for the I2S master clock output is 12.5 MHz in VLPR mode (Very Low Power). There is no I2S clock spec for normal run mode in this document.