Inside The McIntosh Tin Can…
Always wanted to know what was inside the McIntosh tin can in their ESS Sabre-based CD player, the MCD500
High Fidelity Magazine has reviewed the CD/SACD player and published photos of the internals.
It was once speculated that inside the tin can was a custom, high performance clock for the ESS DAC. It tuns out that the components are:
- Ordinary metal can 27 MHz crystal
- BB PLL1705, a multiclock generator (from a 27Mhz crystal). The resultant clocks (256 fs, 384 fs and 768 fs) are specified at 50 psec of RMS jitter
- AD1986, A sample rate converter for up to 4x oversampling capability (up to 192KHz). It would make sense that the master clock is taken from the output of the PL1705.
- LC4032v, a “programmable logic device” which is a device like an FPGA but usually of less complexity. These devices can be used to implement digital filters and the like. It would then make sense that the 4x oversampled signal is fed to this device.
According to ESS, the chip’s oversampling filter can be bypassed and fed an 8xfs signal; from this we can deduce that the programmable logic device in the Mcintosh CD player is implementing a 2x oversampling filter (4x is already applied by the ASRC). Also, according to ESS, the Jitter elimination engine can also be bypassed when a synchronous signal is fed as it is in this case. It is likely (I don’t know for sure) that the McIntosh implementation bypasses the jitter elimination engine because an 8xfs signal is fed into the DAC.
If this is the case, then the McIntosh implementation only uses the “Dynamic Element Matching” present in the ESS DAC in order to achieve the >135dB SNR.
It is notable to mention that one of the limiting factor in this design is the 50 psec jitter specification of the clock generation PLL device; yet this device consistently receives good reviews…